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Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 128 KiB L1I$ 64 KiB 1x64 KiB 2-way set associative write-back L1D$ 64 KiB 1x64 KiB 2-way set associative write-back L2$ 128 KiB L2I$ 64 KiB 1x64 KiB 2-way set associative write-back L2D$ 64 KiB 1x64 KiB 2-way set associative write-back L3$ 128 KiB L3I$ 64 KiB 1x64 KiB 2-way set associative write-back L3D$ 64 KiB 1x64 KiB 2-way set associative write-back L4$ 128 KiB L4I$ 64 KiB 1x64 KiB 2-way set associative write-back L4D$ 64 KiB 1x64 KiB 2-way set associative write-back Mobo 128 KiB   64 KiB 1x64 KiB 2-way set associative write-back