- 
         WikiChip 
        WikiChip
 - 
        
             Architectures 
        Popular x86
- 
                                
Intel
- Client
 - Server
 - Big Cores
 - Small Cores
 
 - 
                                
AMD
 
Popular ARM
- 
                                
ARM
- Server
 - Big
 - Little
 
 - 
                                
Cavium
 - 
                                
Samsung
 
 - 
                                
 - 
         Chips 
        Popular Families
- 
                                
Ampere
 - 
                                
Apple
 - 
                                
Cavium
 - 
                                
HiSilicon
 - 
                                
MediaTek
 - 
                                
NXP
 - 
                                
Qualcomm
 - 
                                
Renesas
 - 
                                
Samsung
 
 - 
                                
 
From WikiChip
					
    Duron 1800 (Applebred)  - AMD    
                	
														Template:mpu The Duron 1800 based on the Applebred core was a 32-bit x86 microprocessor developed by AMD and introduced in mid-2003. This model was part of the third generation of the Duron family. Designed based on AMD's K7 and manufactured using their newer 130 nm process, this MPU operated at 1800 MHz with a bus capable of 266 MT/s with a max TDP of 57 W and a typical TDP of 53 W.
Contents
Cache
- Main article: K7 § Cache
 
| Cache Info [Edit Values] | ||
| L1I$ |  64 KiB 65,536 B   0.0625 MiB  | 
1x64 KiB 2-way set associative | 
| L1D$ |   64 KiB 65,536 B   0.0625 MiB  | 
1x64 KiB 2-way set associative | 
| L2$ |   64 KiB 0.0625 MiB   65,536 B 6.103516e-5 GiB  | 
1x64 KiB 16-way set associative | 
Graphics
This SoC has no integrated graphics processing unit.
Features
- Halt State
 - Sleep State
 
See also
Facts about "Duron 1800 (Applebred)  - AMD"
| has feature | Halt State + and Sleep State + | 
| l1d$ description | 2-way set associative + | 
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + | 
| l1i$ description | 2-way set associative + | 
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + | 
| l2$ description | 16-way set associative + | 
| l2$ size | 0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) + |