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i486DX2-40 - Intel
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Template:mpu i486DX2-40 was a fourth-generation x86 microprocessor introduced by Intel in 1992. This chip, which is based on the 80486 microarchitecture, had a clock doubler operating at 40 MHz, twice the bus frequency. Like the original i486DX, this chip implemented the 80387 FPU on-die and incorporated System Management Mode (SMM).

Cache

Main article: 80486 § Cache
Cache Info [Edit Values]
L1$ 8 KB
"KB" is not declared as a valid unit of measurement for this property.
1x8 KB 4-way set associative (unified, write-through policy )

Graphics

This chip had no integrated graphics processing unit.

Features

See also

Facts about "i486DX2-40 - Intel"
base frequency40 MHz (0.04 GHz, 40,000 kHz) +
bus rate20 MT/s (0.02 GT/s, 20,000 kT/s) +
bus speed20 MHz (0.02 GHz, 20,000 kHz) +
bus typeFSB +
clock multiplier2 +
core count1 +
core name486DX2 +
core voltage5 V (50 dV, 500 cV, 5,000 mV) +
designerIntel +
family80486 +
first launchedMarch 3, 1992 +
full page nameintel/80486/486dx2-40 +
instance ofmicroprocessor +
l1$ description4-way set associative +
l1$ size8 KiB (8,192 B, 0.00781 MiB) +
ldateMarch 3, 1992 +
manufacturerIntel +
max cpu count1 +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max operating temperature85 °C +
microarchitecture80486 +
min operating temperature0 °C +
model numberi486DX2-40 +
nameIntel i486DX2-40 +
part numberA80486DX2-40 + and SB80486DX2-40 +
process1,000 nm (1 μm, 0.001 mm) + and 800 nm (0.8 μm, 8.0e-4 mm) +
s-specSX722 +
series486DX2 +
smp max ways1 +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) +