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From WikiChip
FastMATH-LP - Intrinsity
< intrinsity | fastmath
Template:mpu The FastMATH-LP was a microprocessor developed by Intrinsity operating at 1 GHz. The processor incorporates a high-performance MIPS CPU along with a powerful matrix and vector math unit. This mode was a low-power (LP) version of the normal FastMATH processor, operating at half the speed.
Retrieved from "https://en.wikichip.org/w/index.php?title=intrinsity/fastmath/fastmath-lp&oldid=22668"
Facts about "FastMATH-LP - Intrinsity"
| has feature | JTAG + |
| l1d$ description | 256 blocks × 16 words/block + |
| l1i$ description | 256 blocks × 16 words/block + |
| l2$ description | 4-way set associative + |