Semiconductor & Computer Engineering
-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
FastMATH-LP - Intrinsity
< intrinsity | fastmath
Revision as of 16:25, 3 July 2016 by At32Hz (talk | contribs) (Created page with "{{intrinsity title|FastMATH-LP}} The '''FastMATH-LP''' was a microprocessor developed by Intrinsity operating at 1 GHz. The processor incorporates a high-performance MIP...")
The FastMATH-LP was a microprocessor developed by Intrinsity operating at 1 GHz. The processor incorporates a high-performance MIPS CPU along with a powerful matrix and vector math unit. This mode was a low-power (LP) version of the normal FastMATH processor, operating at half the speed.
Retrieved from "https://en.wikichip.org/w/index.php?title=intrinsity/fastmath/fastmath-lp&oldid=22658"
Facts about "FastMATH-LP - Intrinsity"
| has feature | JTAG + |
| l1d$ description | 256 blocks × 16 words/block + |
| l1i$ description | 256 blocks × 16 words/block + |
| l2$ description | 4-way set associative + |