Semiconductor & Computer Engineering
-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Arrix - MathStar
< mathstar
| Arrix | |
| |
| Developer | MathStar |
| Manufacturer | TSMC |
| Type | Programmable logic device |
| Introduction | September 25, 2006 (announced) November 29, 2006 (launch) |
| Production | 2006-2008 |
| Word size | 16 bit 2 octets
4 nibbles |
| Process | 130 nm 0.13 μm , 90 nm1.3e-4 mm 0.09 μm , 65 nm9.0e-5 mm 0.065 μm , 45 nm6.5e-5 mm 0.045 μm
4.5e-5 mm |
| Technology | CMOS |
| Clock | 1,000 MHz-1,500 MHz |
| Succession | |
| ← | |
| Builder | |
Retrieved from "https://en.wikichip.org/w/index.php?title=mathstar/arrix&oldid=22495"
Facts about "Arrix - MathStar"
| designer | MathStar + |
| first announced | September 25, 2006 + |
| first launched | November 29, 2006 + |
| full page name | mathstar/arrix + |
| instance of | integrated circuit family + |
| main designer | MathStar + |
| manufacturer | TSMC + |
| name | Arrix + |
| package | FCBGA-896 + |
| process | 130 nm (0.13 μm, 1.3e-4 mm) + and 90 nm (0.09 μm, 9.0e-5 mm) + |
| socket | FCBGA-896 + |
| technology | CMOS + |
| word size | 16 bit (2 octets, 4 nibbles) + |