Semiconductor & Computer Engineering
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Am486DX2-80SV8B - AMD
Template:mpu Am486DX2-80SV8B was an Enhanced Am486 microprocessor introduced by AMD in 1996. This processor had a clock multiplier of 2 having base frequency of 80 MHz with a bus frequency of 40 MHz. This "Enhanced" Am486 includes some other features such as SMM, stop-clock control, and write-back cache.
Contents
Cache
- Main article: 80486 § Cache
| Cache Info [Edit Values] | ||
| L1$ | 8 KB "KB" is not declared as a valid unit of measurement for this property. |
1x8 KB 4-way set associative (unified, write-back policy) |
Graphics
This chip had no integrated graphics processing unit.
Features
- System Management Mode (SMM)
See also
Facts about "Am486DX2-80SV8B - AMD"
| base frequency | 80 MHz (0.08 GHz, 80,000 kHz) + |
| bus rate | 40 MT/s (0.04 GT/s, 40,000 kT/s) + |
| bus speed | 40 MHz (0.04 GHz, 40,000 kHz) + |
| bus type | FSB + |
| clock multiplier | 2 + |
| core count | 1 + |
| core name | Am486DX2S + |
| core voltage | 3.3 V (33 dV, 330 cV, 3,300 mV) + |
| core voltage tolerance | 0.3 V + |
| designer | AMD + |
| family | Am486 + |
| first announced | 1995 + |
| first launched | March 1996 + |
| full page name | amd/am486/am486dx2-80sv8b + |
| has feature | System Management Mode + |
| instance of | microprocessor + |
| l1$ description | 4-way set associative + |
| l1$ size | 8 KiB (8,192 B, 0.00781 MiB) + |
| ldate | March 1996 + |
| manufacturer | AMD + |
| max cpu count | 1 + |
| max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
| max operating temperature | 85 °C + |
| microarchitecture | 80486 + |
| min operating temperature | 0 °C + |
| model number | Am486DX2-80SV8B + |
| name | Am486DX2-80SV8B + |
| part number | A80486DX2-80SV8B + |
| process | 500 nm (0.5 μm, 5.0e-4 mm) + |
| series | Am486DX2S + |
| smp max ways | 1 + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + |