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From WikiChip
Broadwell - Microarchitectures - Intel
< intel | microarchitectures
Revision as of 17:12, 12 April 2016 by At32Hz (talk | contribs) (Created page with "{{intel title|Broadwell|arch}} '''Broadwell''' is Intel's microarchitecture based on the 14 nm process for mobile, desktops, and servers. Introduced in early 2015...")
Broadwell is Intel's microarchitecture based on the 14 nm process for mobile, desktops, and servers. Introduced in early 2015, Broadwell is a process shrink of Haswell which introduced several enhancements.
Codenames
Core | Target |
---|---|
Broadwell Y | Core M family, SoC for Smartphones, 2-in-1s Tablets, and notebooks |
Broadwell U | Core ultrabooks |
Broadwell H | IoT (QM87, HM86/HM87 Chipsets), All-in-ones |
Broadwell DT | Unlocked desktop MPUs |
Broadwell EP | Xeon E5, Dual-Processor platform |
Broadwell EX | Xeon E5, Multi-Processor platform, QPI |
Broadwell E | High-End Desktops (HEDT) |
Architecture
Broadwell is for the most part identical to Haswell with server enhancements.
Key changes from Haswell
- FP multiplication instructions has reduced latency (3 cycles, down from 5)
- Affects AVX, SSE, and FP instructions
- CLMUL instructions are now a single μop, improving latency and throughput
- The second-level TLB (STLB)
- Table was enlarged (1,536 entries, up from 1024)
- 1GB page mode (16 entries, 4-ways set associative)
- Larger out-of-order scheduler
- Faster store-to-load forwarding
- Address prediction for branches and returns was improved
- Improved cryptography acceleration instructions