Semiconductor & Computer Engineering
-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Meteor Lake - Microarchitectures - Intel
< intel | microarchitectures
| Edit Values | |
| Meteor Lake µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel, TSMC (?) |
| Introduction | 2022 / 2023 |
| Process | 7 nm, 3 nm from TSMC (?) |
| Instructions | |
| ISA | x86-64 |
| Cores | |
| Core Names | Redwood Cove, Gracemont |
| Succession | |
Meteor Lake (MTL) is Intel's successor to Alder Lake, a 7 nm microarchitecture for mainstream workstations, desktops, and mobile devices.
 |
Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release. |
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/meteor_lake&oldid=98486"
Facts about "Meteor Lake - Microarchitectures - Intel"
| codename | Meteor Lake + |
| designer | Intel + |
| full page name | intel/microarchitectures/meteor lake + |
| instance of | microarchitecture + |
| instruction set architecture | x86-64 + |
| manufacturer | Intel + and TSMC (?) + |
| microarchitecture type | CPU + |
| name | Meteor Lake + |
| process | 7 nm (0.007 μm, 7.0e-6 mm) + |