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From WikiChip
Alder Lake - Microarchitectures - Intel
< intel | microarchitectures
Revision as of 05:09, 21 July 2020 by 60.52.45.117 (talk) (https://www.mail-archive.com/linux-kernel@vger.kernel.org/msg2242174.html →Hybrid Core/Atom Processors: #define INTEL_FAM6_ALDERLAKE 0x97)
Edit Values | |
Alder Lake µarch | |
General Info | |
Arch Type | CPU |
Designer | Intel |
Manufacturer | Intel |
Introduction | 2021 |
Process | 10 nm |
Instructions | |
ISA | x86-64 |
Succession | |
Alder Lake (ADL) is Intel's successor to Tiger Lake, a 10 nm microarchitecture for mainstream workstations, desktops, and mobile devices.
Process Technology
History
Architecture
Key changes from Ice Lake
- Core
- Hybrid Core(big core) & Atom(small core) microarchitecture
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/alder_lake&oldid=97577"
Facts about "Alder Lake - Microarchitectures - Intel"
codename | Alder Lake + |
designer | Intel + |
first launched | 2021 + |
full page name | intel/microarchitectures/alder lake + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Alder Lake + |
processing element count | 32 EU igpu + and 96 EU igpu + |