Semiconductor & Computer Engineering
-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Sapphire Rapids - Microarchitectures - Intel
< intel | microarchitectures
| Edit Values | |
| Sapphire Rapids µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | Intel |
| Manufacturer | Intel |
| Introduction | 2020 |
| Process | 10 nm |
| Instructions | |
| ISA | x86-64 |
| Succession | |
Sapphire Rapids (SPR) is Intel's successor to Ice Lake, an enhanced 10nm++ process microarchitecture for for enthusiasts and servers.
Process Technology
Sapphire Rapids is planned to be manufactured on Intel's 3rd generation enhanced 10nm++ process.
Architecture
Key changes from Ice Lake
 |
Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release. |
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/sapphire_rapids&oldid=76771"
Facts about "Sapphire Rapids - Microarchitectures - Intel"
| codename | Sapphire Rapids + |
| designer | Intel + |
| first launched | 2020 + |
| full page name | intel/microarchitectures/sapphire rapids + |
| instance of | microarchitecture + |
| instruction set architecture | x86-64 + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Sapphire Rapids + |
| process | 10 nm (0.01 μm, 1.0e-5 mm) + |