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From WikiChip
POWER10 - Microarchitectures - IBM
< ibm
Revision as of 11:00, 4 September 2018 by 152.130.15.30 (talk)
| Edit Values | |
| POWER10 µarch | |
| General Info | |
| Arch Type | CPU |
| Designer | IBM |
| Manufacturer | TSMC |
| Introduction | 2020 |
| Process | 7 nm |
| Pipeline | |
| Type | Superscalar |
| Speculative | Yes |
| Reg Renaming | Yes |
| Succession | |
POWER10 is the microarchitecture for IBM's family of POWER10 processors set to be introduced around 2020 timeframe. POWER10 is set the succeed to the POWER9 microarchitecture.
 |
Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release. |
Architecture
Key changes from POWER9
- 7 nm process (from 14 nm)
- 48 cores (from 24)
Retrieved from "https://en.wikichip.org/w/index.php?title=ibm/microarchitectures/power10&oldid=82158"
Facts about "POWER10 - Microarchitectures - IBM"
| codename | POWER10 + |
| designer | IBM + |
| first launched | 2020 + |
| full page name | ibm/microarchitectures/power10 + |
| instance of | microarchitecture + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | POWER10 + |
| process | 7 nm (0.007 μm, 7.0e-6 mm) + |