Semiconductor & Computer Engineering
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Xeon D-1559 - Intel
| Edit Values | |
| Intel Xeon D-1559 | |
| General Info | |
| Designer | Intel |
| Manufacturer | Intel |
| Model Number | D-1559 |
| Part Number | GG8067402570801 |
| S-Spec | SR2M5 |
| Market | Server, Embedded |
| Introduction | April, 2016 (launched) |
| Shop | Amazon |
| General Specs | |
| Family | Xeon D |
| Series | D-1500 |
| Locked | Yes |
| Frequency | 1500 MHz |
| Turbo Frequency | Yes |
| Turbo Frequency | 2100 MHz (1 core) |
| Bus type | DMI 2.0 |
| Clock multiplier | 15 |
| Microarchitecture | |
| ISA | x86-64 (x86) |
| Microarchitecture | Broadwell |
| Platform | Grangeville |
| Core Name | Broadwell DE |
| Core Stepping | Y0 |
| Process | 14 nm |
| Technology | CMOS |
| Word Size | 64 bit |
| Cores | 12 |
| Threads | 24 |
| Max Memory | 128 GiB |
| Multiprocessing | |
| Max SMP | 1-Way (Uniprocessor) |
| Electrical | |
| TDP | 45 W |
| OP Temperature | -40 °C – 85 °C |
The Xeon D-1559 is a 64-bit 12-core x86-64 microserver SoC that was introduced by Intel in April of 2016. The D-1559 operates at 1.5 GHz with a turbo frequency of 2.1 GHz. This chip, which is based on the Broadwell microarchitecture and manufactured in 14 nm process, has a TDP of 45 W and can support up to 128 GB of RAM (DDR3L/DDR4).
Cache
- Main article: Broadwell § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 384 KiB 393,216 B 0.375 MiB |
12x32 KiB 8-way set associative (per core) |
| L1D$ | 384 KiB 393,216 B 0.375 MiB |
12x32 KiB 8-way set associative (per core) |
| L2$ | 3 MiB 3,072 KiB 3,145,728 B 0.00293 GiB |
12x256 KiB 8-way set associative (per core) |
| L3$ | 18 MiB 18,432 KiB 18,874,368 B 0.0176 GiB |
12x1.5 MiB (per core) |
Graphics
This SoC has no integrated graphics processing unit.
Memory controller
| Integrated Memory Controller | |
| Type | DDR3L-1333, DDR3L-1600, DDR4-1600, DDR4-1867, DDR4-2133 |
| Controllers | 1 |
| Channels | 2 |
| ECC Support | Yes |
| Max memory | 128 GiB |
Expansions
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Expansion Options
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Networking
| Networking | |
| SFI interface | Yes |
| KR interface | Yes |
| KR4 interface | No |
| KX interface | Yes |
| KX4 interface | No |
| 10Base-T | No |
| 100Base-T | No |
| 1000Base-T | Yes |
| 10GBase-T | Yes |
Features
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Facts about "Xeon D-1559 - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Xeon D-1559 - Intel#io + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology + and Transactional Synchronization Extensions + |
| has intel enhanced speedstep technology | true + |
| has intel trusted execution technology | true + |
| has intel turbo boost technology 2 0 | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 384 KiB (393,216 B, 0.375 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 384 KiB (393,216 B, 0.375 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
| l3$ size | 18 MiB (18,432 KiB, 18,874,368 B, 0.0176 GiB) + |
| max pcie lanes | 8 + |