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Core i3-2308M |
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Designer | Intel |
Manufacturer | Intel |
Model Number | i3-2308M |
Part Number | FF8062701275000 |
S-Spec | SR0TB |
Market | Mobile |
Introduction | February, 2011 (announced) February, 2011 (launched) |
Shop | Amazon |
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Family | Core i3 |
Series | i3-2000 |
Locked | Yes |
Frequency | 2,100 MHz |
Bus type | DMI 2.0 |
Bus rate | 4 × 5 GT/s |
Clock multiplier | 21 |
CPUID | 0x206A7 |
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ISA | x86-64 (x86) |
Microarchitecture | Sandy Bridge |
Platform | Sandy Bridge M |
Chipset | Cougar Point |
Core Name | Sandy Bridge M |
Core Family | 6 |
Core Model | 42 |
Core Stepping | J1 |
Process | 32 nm |
Transistors | 624,000,000 |
Technology | CMOS |
Die | 149 mm² |
Word Size | 64 bit |
Cores | 2 |
Threads | 4 |
Max Memory | 16 GiB |
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Max SMP | 1-Way (Uniprocessor) |
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Power (idle) | 3.1 W |
Vcore | 0.3 V-1.52 V |
TDP | 35 W |
Tjunction | 0 °C – 100 °C |
Tstorage | -25 °C – 125 °C |
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Package | rPGA988B (PGA) |
Dimension | 37.5 mm x 37.5 mm |
Pitch | 1 mm |
Contacts | 988 |
Socket | Socket G2 |
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Core i3-2308M is a dual-core entry-level performance mobile x86 microprocessor introduced by Intel in early 2011. Fabricated on a 32 nm process based on the Sandy Bridge microarchitecture, this processor operates at 2.1 GHz with a TDP of 35 Watts. The i3-2308M supports up to 16 GiB of dual-channel DDR3-1333 memory and incorporates Intel's HD Graphics 3000 integrated graphics operating at 650 MHz with a burst frequency of 1.1 GHz.
Cache
- Main article: Sandy Bridge § Cache
[Edit/Modify Cache Info]
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Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.
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L1$ | 128 KiB 131,072 B 0.125 MiB
| L1I$ | 64 KiB 65,536 B 0.0625 MiB
| 2x32 KiB | 8-way set associative | |
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L1D$ | 64 KiB 65,536 B 0.0625 MiB
| 2x32 KiB | 8-way set associative | write-back |
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| L2$ | 512 KiB 0.5 MiB 524,288 B 4.882812e-4 GiB
| | | 2x256 KiB | 8-way set associative | write-back |
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| L3$ | 3 MiB 3,072 KiB 3,145,728 B 0.00293 GiB
| | | 2x1.5 MiB | 12-way set associative | write-back |
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Memory controller
[Edit/Modify Memory Info]
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Integrated Memory Controller
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Max Type | DDR3-1333, DDR3-1066 |
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Supports ECC | No |
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Max Mem | 16 GiB |
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Controllers | 1 |
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Channels | 2 |
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Max Bandwidth | 19.87 GiB/s 20,346.88 MiB/s 21.335 GB/s 21,335.25 MB/s 0.0194 TiB/s 0.0213 TB/s
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Bandwidth |
Single 9.93 GiB/s Double 19.87 GiB/s
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Expansions
Wireless
Wireless Communications |
Cellular |
4G | |
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Graphics
[Edit/Modify IGP Info]
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Integrated Graphics Information
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GPU | HD Graphics 3000 |
Designer | Intel | Device ID | 0x116 |
Execution Units | 12 | Max Displays | 2 |
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Frequency | 650 MHz 0.65 GHz 650,000 KHz
| Burst Frequency | 1,100 MHz 1.1 GHz 1,100,000 KHz
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Output | DP, eDP, HDMI, SDVO, CRT |
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| Standards | DirectX | 10.1 |
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OpenGL | 3.1 | DP | 1.1 | eDP | 1.1 | HDMI | 1.4 |
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| Additional Features | |
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[Edit] Sandy Bridge (Gen6) Hardware Accelerated Video Capabilities
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Codec |
Encode |
Decode
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Profiles |
Levels |
Max Resolution |
Profiles |
Levels |
Max Resolution
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MPEG-2 (H.262) |
✘ |
Main |
Main, High |
Up to 80 Mbps
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MPEG-4 AVC (H.264) |
Main |
4.1 |
Up to 40 Mbps |
Main, High |
4.1 |
Up to 40 Mbps
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VC-1 |
✘ |
Advanced, Main, Simple |
3, High, Simple |
Up to 40 Mbps
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Features