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From WikiChip
intel/microarchitectures/kaby lake
< intel | microarchitectures
Revision as of 20:33, 17 November 2017 by 146.185.28.59 (talk) (Replaced content with "no f you <big><big><big><big><big><big><big><big><big><big><big><big><big><big><big>🖕🏼<big><big><big><big><big><big><big><big><big><big><big><big><big><big><big>")
no f you 🖕🏼
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/kaby_lake&oldid=67210"
Facts about "Kaby Lake - Microarchitectures - Intel"
| codename | Kaby Lake + |
| core count | 2 + and 4 + |
| designer | Intel + |
| first launched | August 30, 2016 + |
| full page name | intel/microarchitectures/kaby lake + |
| instance of | microarchitecture + |
| instruction set architecture | x86-64 + |
| manufacturer | Intel + |
| microarchitecture type | CPU + |
| name | Kaby Lake + |
| pipeline stages (max) | 19 + |
| pipeline stages (min) | 14 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |