Semiconductor & Computer Engineering
| Edit Values | |||||||||
| Atom 330 | |||||||||
| General Info | |||||||||
| Designer | Intel | ||||||||
| Manufacturer | Intel | ||||||||
| Model Number | 330 | ||||||||
| Part Number | AU80587RE0251M | ||||||||
| S-Spec | SLG9Y QKGY (QS) | ||||||||
| Market | Mobile | ||||||||
| Introduction | April 2, 2008 (announced) September 21, 2008 (launched) | ||||||||
| Release Price | $43 | ||||||||
| Shop | Amazon | ||||||||
| General Specs | |||||||||
| Family | Atom | ||||||||
| Series | 200 | ||||||||
| Locked | Yes | ||||||||
| Frequency | 1599.99 MHz | ||||||||
| Bus type | FSB | ||||||||
| Bus speed | 133.33 MHz | ||||||||
| Bus rate | 533.33 MT/s | ||||||||
| Clock multiplier | 12 | ||||||||
| CPUID | 106C2 | ||||||||
| Microarchitecture | |||||||||
| ISA | x86-64 (x86) | ||||||||
| Microarchitecture | Bonnell | ||||||||
| Platform | Nettop 2008 | ||||||||
| Chipset | Calistoga | ||||||||
| Core Name | Diamondville | ||||||||
| Core Family | 6 | ||||||||
| Core Model | 112 | ||||||||
| Core Stepping | C0 | ||||||||
| Process | 45 nm | ||||||||
| Transistors | 94,424,414 | ||||||||
| Technology | CMOS | ||||||||
| Die | 51.9276 mm² 7.94 mm × 6.54 mm | ||||||||
| Word Size | 64 bit | ||||||||
| Cores | 2 | ||||||||
| Threads | 4 | ||||||||
| Max Memory | 8 GiB | ||||||||
| Multiprocessing | |||||||||
| Max SMP | 1-Way (Uniprocessor) | ||||||||
| Electrical | |||||||||
| Vcore | 0.9 V-1.1625 V | ||||||||
| VI/O | 1.1 V ± 0.05 V | ||||||||
| TDP | 8 W | ||||||||
| Tcase | 0 °C – 85.2 °C | ||||||||
| Tstorage | -40 °C – 85 °C | ||||||||
| Packaging | |||||||||
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Atom 330 is an ultra-low power 64-bit x86 dual-core microprocessor introduced by Intel in late 2008. The 330 is specifically designed for nettops and various other mobile internet connected devices. This processor, which was fabricated on Intel's 45 nm process, was based on the Bonnell microarchitecture. The Atom 330 operates at 1.6 GHz with a TDP of 8 W with an average power consumption of 1.2 W. The MPU features a legacy QDR 533 MT/s front-side bus.
The Atom 330 is actually two identical Atom 230 dies packaged together to form a dual-core Atom processor; it thus has exactly twice as many transistors, occupy twice the die size, and consumes twice as much power as the 230.
Cache
- Main article: Bonnell § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
This processor has no integrated memory controller.
Graphics
This processor has no integrated graphics.
Features
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Documents
Datasheets
- Atom 330 Datasheet, April 2010
Other
- Atom 300 Series Specification Update, April 2010
- Atom 300 Series Thermal and Mechanical Design Guidelines, September 2008
| has feature | Hyper-Threading Technology + |
| has simultaneous multithreading | true + |
| l1$ size | 112 KiB (114,688 B, 0.109 MiB) + |
| l1d$ description | 6-way set associative + |
| l1d$ size | 48 KiB (49,152 B, 0.0469 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) + |