From WikiChip
PEZY-SC4 - PEZY
Template:mpu PEZY-SC4 (PEZY Super Computer 4) is fifth generation many-core microprocessor planned by PEZY. The SC4 incorporates 16,192 cores, twice times as many cores as its predecessor.
Planned to be fabricated on TSMC's 5 nm process, PEZY-SC5 operates at 1.6 GHz and consume around 640 W while delivering performance in the order of 210 TFLOPS (HP), 105 TFLOPS (SP), and 52.5 TFLOPS (DP).
Memory controller
Integrated Memory Controller
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Integrated Memory Controller
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Facts about "PEZY-SC4 - PEZY"
has ecc memory support | true + and false + |
max memory bandwidth | 119.2 GiB/s (122,060.8 MiB/s, 127.99 GB/s, 127,990.025 MB/s, 0.116 TiB/s, 0.128 TB/s) + and 22,886.4 GiB/s (23,435,673.6 MiB/s, 24,574.085 GB/s, 24,574,084.881 MB/s, 22.35 TiB/s, 24.574 TB/s) + |
max memory channels | 4 + and 8 + |
supported memory type | DDR5-4000 + |