Template:mpu Am486DX2-100V16B was an 80486-compatible microprocessor introduced by AMD in 1995. This processor had a clock multiplier of 2 having base frequency of 100 MHz with a bus frequency of 50 MHz. This model had a write-back cache and double the size of L1 of previous models (16 KB). The Am486DX2-100V8T and Am486DX2-100V8B are an 8 KB version of this model.

Cache

Main article: 80486 § Cache

Cache Info [Edit Values]
L1$	16 KiB 16,384 B 0.0156 MiB	1x16 KiB 4-way set associative (unified, write-back policy)

Graphics

This chip had no integrated graphics processing unit.

See also

• Am486 family