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CN5860-800 EXP - Cavium
Cache
- Main article: cnMIPS § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Expansions
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Expansion Options
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Networking
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Networking
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Facts about "CN5860-800 EXP - Cavium"
l1$ size | 768 KiB (786,432 B, 0.75 MiB) + |
l1d$ description | 64-way set associative + |
l1d$ size | 256 KiB (262,144 B, 0.25 MiB) + |
l1i$ description | 64-way set associative + |
l1i$ size | 512 KiB (524,288 B, 0.5 MiB) + |
l2$ description | 8-way set associative + |
l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |