Semiconductor & Computer Engineering
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{{title|Scaling Booster}} | {{title|Scaling Booster}} | ||
| − | A '''scaling booster''' is an enhancement made to a [[process node]] beyond | + | A '''scaling booster''' is an enhancement made to a [[process node]] beyond classical scaling vectors in order to allow [[Moore's Law]] device scaling to continue or accelerate. |
== Overview == | == Overview == | ||
| − | As [[process nodes]] continues to shrink, classical scaling vectors (e.g., [[gate pitch]]) becomes increasingly challenging. There are multiple reasons for this including electrostatics in the FEOL, RC delays in the BEOL, as well as general routing challenges. Scaling boosters have been introduced in order to aid traditional scaling vectors through various modifications and enhancements. Scaling boosters may be part of the process technology flow itself or as part of the standard library as part of the design-technology co-optimization (DTCO). | + | As [[process nodes]] continues to shrink, classical scaling vectors (e.g., [[gate pitch]]) becomes increasingly challenging. There are multiple reasons for this including electrostatics in the FEOL, RC delays in the BEOL, as well as general routing challenges. Scaling boosters have been introduced in order to aid traditional scaling vectors through various modifications and enhancements. Scaling boosters may be part of the process technology flow itself or as part of the standard library as part of the design-technology co-optimization (DTCO). By combining scaling boosters with slightly less aggressive classical scaling vectors, a process node can achieve similar transistors density while keeping the process cost in check. |
== Boosters == | == Boosters == | ||
| + | === Track Reduction === | ||
| + | {{empty section}} | ||
| + | === Self-Aligned Contacts (SAC) === | ||
| + | {{empty section}} | ||
| + | === Self-Aligned Vias (SAV) === | ||
| + | {{empty section}} | ||
| + | === Single Diffusion Break (SDB) === | ||
| + | {{empty section}} | ||
| + | ==== Mixed Diffusion Break (MDB) ==== | ||
| + | {{empty section}} | ||
| + | === Contact Over Active Gate (COAG) === | ||
| + | {{empty section}} | ||
| + | === Buried Power Rail (BPR) === | ||
| + | {{empty section}} | ||
| + | === SuperVia === | ||
| + | {{empty section}} | ||
| + | === Fully Self Aligned Via (FSAV) === | ||
| + | {{empty section}} | ||
| + | === Self-Aligned Block (SAB) === | ||
{{empty section}} | {{empty section}} | ||
Revision as of 10:49, 13 October 2019
A scaling booster is an enhancement made to a process node beyond classical scaling vectors in order to allow Moore's Law device scaling to continue or accelerate.
Contents
Overview
As process nodes continues to shrink, classical scaling vectors (e.g., gate pitch) becomes increasingly challenging. There are multiple reasons for this including electrostatics in the FEOL, RC delays in the BEOL, as well as general routing challenges. Scaling boosters have been introduced in order to aid traditional scaling vectors through various modifications and enhancements. Scaling boosters may be part of the process technology flow itself or as part of the standard library as part of the design-technology co-optimization (DTCO). By combining scaling boosters with slightly less aggressive classical scaling vectors, a process node can achieve similar transistors density while keeping the process cost in check.
Boosters
Track Reduction
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This section is empty; you can help add the missing info by editing this page. |
Self-Aligned Contacts (SAC)
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This section is empty; you can help add the missing info by editing this page. |
Self-Aligned Vias (SAV)
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This section is empty; you can help add the missing info by editing this page. |
Single Diffusion Break (SDB)
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This section is empty; you can help add the missing info by editing this page. |
Mixed Diffusion Break (MDB)
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This section is empty; you can help add the missing info by editing this page. |
Contact Over Active Gate (COAG)
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This section is empty; you can help add the missing info by editing this page. |
Buried Power Rail (BPR)
| |
This section is empty; you can help add the missing info by editing this page. |
SuperVia
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This section is empty; you can help add the missing info by editing this page. |
Fully Self Aligned Via (FSAV)
| |
This section is empty; you can help add the missing info by editing this page. |
Self-Aligned Block (SAB)
| |
This section is empty; you can help add the missing info by editing this page. |