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Difference between revisions of "google/tpu/edge tpu"
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{{google title|Edge TPU}} | {{google title|Edge TPU}} | ||
− | {{chip}} | + | {{chip |
+ | |name=Edge TPU | ||
+ | |image=edge tpu (front).png | ||
+ | |back image=edge tpu (back).png | ||
+ | |designer=Google | ||
+ | |model number=TPU Edge | ||
+ | |market=Embedded | ||
+ | |market 2=Edge Computing | ||
+ | |first announced=July 25, 2018 | ||
+ | |first launched=July 25, 2018 | ||
+ | |family=TPU | ||
+ | |technology=CMOS | ||
+ | }} | ||
'''Edge TPU''' is a [[neural processor]] designed by [[Google]] and introduced in early 2019 for inference acceleration of machine learning at the edge. | '''Edge TPU''' is a [[neural processor]] designed by [[Google]] and introduced in early 2019 for inference acceleration of machine learning at the edge. |
Revision as of 00:22, 20 May 2019
Edit Values | |
Edge TPU | |
General Info | |
Designer | |
Model Number | TPU Edge |
Market | Embedded, Edge Computing |
Introduction | July 25, 2018 (announced) July 25, 2018 (launched) |
General Specs | |
Family | TPU |
Microarchitecture | |
Technology | CMOS |
Packaging | |
Edge TPU is a neural processor designed by Google and introduced in early 2019 for inference acceleration of machine learning at the edge.
Facts about "Edge TPU - Google"
back image | + |
designer | Google + |
family | TPU + |
first announced | July 25, 2018 + |
first launched | July 25, 2018 + |
full page name | google/tpu/edge tpu + |
instance of | microprocessor + |
ldate | July 25, 2018 + |
main image | + |
market segment | Embedded + and Edge Computing + |
model number | TPU Edge + |
name | Edge TPU + |
technology | CMOS + |
used by | Coral Dev Board +, Coral USB Accelerator +, Dev Board Mini +, Mini PCIe Accelerator +, M.2 Accelerator A+E key +, M.2 Accelerator B+M key +, System-on-Module (SoM) + and Accelerator Module + |