From WikiChip
Difference between revisions of "google/tpu/edge tpu"
< google

(edge tpu)
 
Line 1: Line 1:
 
{{google title|Edge TPU}}
 
{{google title|Edge TPU}}
{{chip}}
+
{{chip
 +
|name=Edge TPU
 +
|image=edge tpu (front).png
 +
|back image=edge tpu (back).png
 +
|designer=Google
 +
|model number=TPU Edge
 +
|market=Embedded
 +
|market 2=Edge Computing
 +
|first announced=July 25, 2018
 +
|first launched=July 25, 2018
 +
|family=TPU
 +
|technology=CMOS
 +
}}
 
'''Edge TPU''' is a [[neural processor]] designed by [[Google]] and introduced in early 2019 for inference acceleration of machine learning at the edge.
 
'''Edge TPU''' is a [[neural processor]] designed by [[Google]] and introduced in early 2019 for inference acceleration of machine learning at the edge.

Revision as of 01:22, 20 May 2019

Edit Values
Edge TPU
edge tpu (front).png
General Info
DesignerGoogle
Model NumberTPU Edge
MarketEmbedded, Edge Computing
IntroductionJuly 25, 2018 (announced)
July 25, 2018 (launched)
General Specs
FamilyTPU
Microarchitecture
TechnologyCMOS
Packaging
edge tpu (back).png

Edge TPU is a neural processor designed by Google and introduced in early 2019 for inference acceleration of machine learning at the edge.

Facts about "Edge TPU - Google"
back imageFile:edge tpu (back).png +
designerGoogle +
familyTPU +
first announcedJuly 25, 2018 +
first launchedJuly 25, 2018 +
full page namegoogle/tpu/edge tpu +
instance ofmicroprocessor +
ldateJuly 25, 2018 +
main imageFile:edge tpu (front).png +
market segmentEmbedded + and Edge Computing +
model numberTPU Edge +
nameEdge TPU +
technologyCMOS +
used byCoral Dev Board +, Coral USB Accelerator +, Dev Board Mini +, Mini PCIe Accelerator +, M.2 Accelerator A+E key +, M.2 Accelerator B+M key +, System-on-Module (SoM) + and Accelerator Module +