Revision as of 19:38, 17 April 2019

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Xeon Gold 6242
General Info
Designer	Intel
Manufacturer	Intel
Model Number	6242
Market	Server
Introduction	March, 2019 (announced) March, 2019 (launched)
Shop	Amazon
General Specs
Family	Xeon Gold
Series	6000
Locked	Yes
Frequency	2,800 MHz
Turbo Frequency	3,900 MHz (1 core)
Bus type	DMI 3.0
Bus rate	4 × 8 GT/s
Clock multiplier	28
CPUID	0x50655
Microarchitecture
ISA	x86-64 (x86)
Microarchitecture	Cascade Lake
Platform	Purley
Chipset	Lewisburg
Core Name	Cascade Lake SP
Core Family	6
Process	14 nm
Technology	CMOS
Word Size	64 bit
Cores	16
Threads	32
Max Memory	? GiB
Multiprocessing
Max SMP	4-Way (Multiprocessor)
Electrical
TDP	150 W
Packaging
Template:packages/intel/fclga-3647

Xeon Gold 6242 is a 64-bit 16-core x86 multi-socket high performance server microprocessor set to introduced by Intel in early 2019. This chip supports up to 4-way multiprocessing. The Gold 6242, which is based on the Cascade Lake microarchitecture and is manufactured on a 14 nm process, sports 2 AVX-512 FMA units as well as three Ultra Path Interconnect links. This microprocessor, which operates at 2.8 GHz with a TDP of 150 W and a turbo boost frequency of up to 3.9 GHz, supports up ? GiB of hexa-channel DDR4-2666 ECC memory.

Preliminary Data! Information presented in this article deal with a microprocessor or chip that was recently announced or leaked, thus missing information regarding its features and exact specification. Information may be incomplete and can change by final release.

Cache

Main article: Cascade Lake § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 1 MiB 1,024 KiB 1,048,576 B L1I$ 512 KiB 524,288 B 0.5 MiB 16x32 KiB 8-way set associative   L1D$ 512 KiB 524,288 B 0.5 MiB 16x32 KiB 8-way set associative write-back L2$ 16 MiB 16,384 KiB 16,777,216 B 0.0156 GiB     16x1 MiB 16-way set associative write-back L3$ 22 MiB 22,528 KiB 23,068,672 B 0.0215 GiB     16x1.375 MiB 11-way set associative write-back

Memory controller

[Edit/Modify Memory Info]

	Integrated Memory Controller
	Max Type DDR4-2933 Supports ECC Yes Max Mem 1024GiB Controllers 2 Channels 6 Max Bandwidth 119.21 GiB/s 122,071.04 MiB/s 128.001 GB/s 128,000.763 MB/s 0.116 TiB/s 0.128 TB/s Bandwidth Single 19.87 GiB/s Double 39.74 GiB/s Quad 79.47 GiB/s Hexa 119.21 GiB/s

Expansions

[Edit/Modify Expansions Info]

	Expansion Options
	PCIe Revision 3.0 Max Lanes 48 Configs x16, x8, x4

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX MMX Extension EMMX Extended MMX Extension SSE Streaming SIMD Extensions SSE2 Streaming SIMD Extensions 2 SSE3 Streaming SIMD Extensions 3 SSSE3 Supplemental SSE3 SSE4.1 Streaming SIMD Extensions 4.1 SSE4.2 Streaming SIMD Extensions 4.2 AVX Advanced Vector Extensions AVX2 Advanced Vector Extensions 2 AVX-512 Advanced Vector 512-bit AVX512F AVX-512 Foundation AVX512CD AVX-512 Conflict Detection AVX512BW AVX-512 Byte and Word AVX512DQ AVX-512 Doubleword and Quadword Instructions AVX512VL AVX-512 Vector Length AVX512_VNNI AVX-512 Vector Neural Network Instructions ABM Advanced Bit Manipulation BMI1 Bit Manipulation Instruction Set 1 BMI2 Bit Manipulation Instruction Set 2 FMA3 3-Operand Fused-Multiply-Add AES AES Encryption Instructions RdRand Hardware RNG ADX Multi-Precision Add-Carry CLMUL Carry-less Multiplication Extension F16C 16-bit Floating Point Conversion x86-16 16-bit x86 x86-32 32-bit x86 x86-64 64-bit x86 Real Real Mode Protected Protected Mode SMM System Management Mode FPU Integrated x87 FPU NX No-eXecute HT Hyper-Threading TBT 2.0 Turbo Boost Technology 2.0 EIST Enhanced SpeedStep Technology SST Speed Shift Technology TXT Trusted Execution Technology (SMX) vPro Intel vPro VT-x VT-x (Virtualization) VT-d VT-d (I/O MMU virtualization) EPT Extended Page Tables (SLAT) TSX Transactional Synchronization Extensions VMD Volume Management Device NM Node Manager KPT Key Protection Technology PTT Platform Trust Technology Run Sure Run Sure Technology (RAS Capability) MBE Ctrl Mode-Based Execute Control Node Ctrlr Node Controller Support DL Boost Deep Learning Boost