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Difference between revisions of "tsmc/cowos"
< tsmc
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Revision as of 00:11, 11 January 2019
v · d · e | |
Packaging | |
Technologies | |
Concepts | |
Single-Row | |
Dual-Row | |
Quad-Row | |
Grid Array | |
2.5D IC | |
3D IC | |
Chip-on-Wafer-on-Substrate (CoWoS) is a two-point-five dimensional integrated circuit (2.5D IC) through-silicon via (TSV) interposer-based packaging technology designed by TSMC.
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