Semiconductor & Computer Engineering
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Difference between revisions of "pollack's rule"
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{{title|Pollack's Rule}} | {{title|Pollack's Rule}} | ||
'''Pollack's rule''' states that the performance increase delivered by [[microarchitectural]] improvements is roughly proportional to the square root of the increase in logic complexity. In other words, in order to double the performance of a design, you need to quadruple the logic complexity or alternatively doubling the logic in the [[physical core|core]] will deliver roughly 1.4x more performance. | '''Pollack's rule''' states that the performance increase delivered by [[microarchitectural]] improvements is roughly proportional to the square root of the increase in logic complexity. In other words, in order to double the performance of a design, you need to quadruple the logic complexity or alternatively doubling the logic in the [[physical core|core]] will deliver roughly 1.4x more performance. | ||
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| + | :<math>\texttt{performance} \propto \sqrt{\texttt{die} \texttt{area}}</math> | ||
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== See also == | == See also == | ||
Revision as of 23:18, 4 January 2019
Pollack's rule states that the performance increase delivered by microarchitectural improvements is roughly proportional to the square root of the increase in logic complexity. In other words, in order to double the performance of a design, you need to quadruple the logic complexity or alternatively doubling the logic in the core will deliver roughly 1.4x more performance.
See also
Reference
- Borkar, Shekhar. "Thousand core chips: a technology perspective." Proceedings of the 44th annual Design Automation Conference. ACM, 2007.
