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Difference between revisions of "arm holdings/microarchitectures/arm8"
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== Architecture == | == Architecture == | ||
=== Key changes from {{\\|ARM7}} === | === Key changes from {{\\|ARM7}} === | ||
+ | * [[ARMv4]] (from [[ARMv3]]) | ||
* 2x performance (ARM810 vs ARM710 on the same [[process node]]) | * 2x performance (ARM810 vs ARM710 on the same [[process node]]) | ||
** 26% lower [[cycles per instruction|CPI]] (1.4, down from 1.9) | ** 26% lower [[cycles per instruction|CPI]] (1.4, down from 1.9) |
Revision as of 03:32, 31 December 2018
Edit Values | |
ARM8 µarch | |
General Info | |
Arch Type | CPU |
Designer | ARM Holdings |
Manufacturer | TSMC |
Introduction | July 8, 1996 |
Instructions | |
ISA | ARMv4 |
Succession | |
ARM8 is the successor to the ARM7, a low-power performance ARM microarchitecture designed by ARM Holdings for the mobile market. This microarchitecture is designed as an IP core and is sold to other semiconductor companies to be implemented in their own chips.
Architecture
Key changes from ARM7
- ARMv4 (from ARMv3)
- 2x performance (ARM810 vs ARM710 on the same process node)
- 26% lower CPI (1.4, down from 1.9)
- 0.6 µm process (down from 0.8 µm)
- 1.66x longer pipeline (5 stages, up from 3)
Die
ARM810
- 0.6 µm process
- 3.3 V
- 0.5 W
- 3-Layer Metal CMOS
- 53.5 mm² (not including pad ring)
- 144 TQFP
Bibliography
Facts about "ARM8 - Microarchitectures - ARM"
codename | ARM8 + |
designer | ARM Holdings + |
first launched | July 8, 1996 + |
full page name | arm holdings/microarchitectures/arm8 + |
instance of | microarchitecture + |
instruction set architecture | ARMv4 + |
manufacturer | TSMC + |
microarchitecture type | CPU + |
name | ARM8 + |