Semiconductor & Computer Engineering
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Difference between revisions of "annapurna labs/alpine"
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| isa = ARM | | isa = ARM | ||
| microarch = ARM7 | | microarch = ARM7 | ||
| + | | microarch 2 = Cortex-A15 | ||
| + | | microarch 3 = Cortex-A57 | ||
| + | | microarch 4 = Cortex-A72 | ||
| word = 32 bit | | word = 32 bit | ||
| word 2 = 64 bit | | word 2 = 64 bit | ||
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| package 2 = | | package 2 = | ||
}} | }} | ||
| − | '''Alpine | + | '''Alpine''' is a family of [[ARM]] SoCs designed by [[Annapurna Labs]] and introduced in [[2016]] for embedded networking devices. Alpine chips are found in various home gateways, routers, NAS devices, and other network devices. |
== Members == | == Members == | ||
Revision as of 17:50, 27 November 2018
| Alpine | |
| Developer | Annapurna Labs |
| Manufacturer | TSMC |
| Type | system on chips |
| Introduction | January 6, 2016 (announced) January 6, 2016 (launch) |
| ISA | ARM |
| µarch | ARM7, Cortex-A15, Cortex-A57, Cortex-A72 |
| Word size | 32 bit 4 octets , 64 bit8 nibbles 8 octets
16 nibbles |
| Technology | CMOS |
Alpine is a family of ARM SoCs designed by Annapurna Labs and introduced in 2016 for embedded networking devices. Alpine chips are found in various home gateways, routers, NAS devices, and other network devices.
Members
Facts about "Alpine - Annapurna Labs (Amazon)"
| designer | Annapurna Labs + |
| first announced | January 6, 2016 + |
| first launched | January 6, 2016 + |
| full page name | annapurna labs/alpine + |
| instance of | system on a chip family + |
| instruction set architecture | ARM + |
| main designer | Annapurna Labs + |
| manufacturer | TSMC + |
| microarchitecture | ARM7 +, Cortex-A15 +, Cortex-A57 + and Cortex-A72 + |
| name | Alpine + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + and 64 bit (8 octets, 16 nibbles) + |