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Difference between revisions of "Template:interconnect arch"
| Line 9: | Line 9: | ||
| | | | ||
* [[accelerated graphics port|AGP]] | * [[accelerated graphics port|AGP]] | ||
| + | * [[CCIX]] | ||
* [[extended industry standard architecture|EISA]] | * [[extended industry standard architecture|EISA]] | ||
| + | * [[Gen-Z]] | ||
* [[hypertransport|HT]] | * [[hypertransport|HT]] | ||
* {{amd|infinity fabric|IF}} | * {{amd|infinity fabric|IF}} | ||
| Line 16: | Line 18: | ||
* [[Multibus]] | * [[Multibus]] | ||
* {{nvidia|NVLink}} | * {{nvidia|NVLink}} | ||
| + | * [[OpenCAPI]] | ||
* [[peripheral component interconnect|PCI]] | * [[peripheral component interconnect|PCI]] | ||
* [[peripheral component interconnect express|PCIe]] | * [[peripheral component interconnect express|PCIe]] | ||
