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Difference between revisions of "intel/microarchitectures/polaris"
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'''Polaris''' was a research [[microarchitecture]] designed by [[Intel]] [[Intel Labs|Labs]] demonstarting the theoretical capabilities of a [[many-core]] chip performing 1 [[trillion floating point operations]]. | '''Polaris''' was a research [[microarchitecture]] designed by [[Intel]] [[Intel Labs|Labs]] demonstarting the theoretical capabilities of a [[many-core]] chip performing 1 [[trillion floating point operations]]. |
Revision as of 18:49, 8 April 2018
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Polaris was a research microarchitecture designed by Intel Labs demonstarting the theoretical capabilities of a many-core chip performing 1 trillion floating point operations.
Facts about "Polaris - Microarchitectures - Intel"
codename | Polaris + |
core count | 80 + |
designer | Intel + |
first launched | February 2007 + |
full page name | intel/microarchitectures/polaris + |
instance of | microarchitecture + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Polaris + |
pipeline stages | 9 + |
process | 65 nm (0.065 μm, 6.5e-5 mm) + |