Difference between revisions of "intel/xeon d/d-1521"

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Revision as of 14:54, 13 December 2017

Template:mpu The Xeon D-1521 is a 64-bit quad-core x86-64 microserver SoC that was introduced by Intel in March of 2015. The D-1521 operates at 2.4 GHz with a turbo frequency of 2.7 GHz. This chip, which is based on the Broadwell microarchitecture and manufactured in 14 nm process, has a TDP of 45 W and can support up to 128 GB of RAM (DDR3L/DDR4).

1 Cache
2 Graphics
3 Memory controller
4 Expansions
5 Networking
6 Features

Cache

Main article: Broadwell § Cache

Cache Info [Edit Values]
L1I$	128 KiB 131,072 B 0.125 MiB	4x32 KiB 8-way set associative (per core)
L1D$	128 KiB 131,072 B 0.125 MiB	4x32 KiB 8-way set associative (per core)
L2$	1 MiB 1,024 KiB 1,048,576 B 9.765625e-4 GiB	4x256 KiB 8-way set associative (per core)
L3$	6 MiB 6,144 KiB 6,291,456 B 0.00586 GiB	4x1.5 MiB (per core)

Graphics

This SoC has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type	DDR3L-1333, DDR3L-1600, DDR4-1600, DDR4-1867, DDR4-2133
Controllers	1
Channels	2
ECC Support	Yes
Max memory	128 GiB

Expansions

[Edit/Modify Expansions Info]

Expansion Options

PCIe

Revision	2.0
Max Lanes	8
Configs	x4, x16

USB

Revision	2.0, 3.0
Ports	8

UART

Integrated LAN	Yes

Networking

Networking
SFI interface	Yes
KR interface	Yes
KR4 interface	No
KX interface	Yes
KX4 interface	No
10Base-T	No
100Base-T	No
1000Base-T	Yes
10GBase-T	Yes

Features

[Edit/Modify Supported Features]

Supported x86 Extensions & Processor Features

MMX	MMX Extension
SSE	Streaming SIMD Extensions
SSE2	Streaming SIMD Extensions 2
SSE3	Streaming SIMD Extensions 3
SSSE3	Supplemental SSE3
AVX	Advanced Vector Extensions
AVX2	Advanced Vector Extensions 2
BMI1	Bit Manipulation Instruction Set 1
BMI2	Bit Manipulation Instruction Set 2
FMA3	3-Operand Fused-Multiply-Add
AES	AES Encryption Instructions
F16C	16-bit Floating Point Conversion

NX	No-eXecute
HT	Hyper-Threading
TBT 2.0	Turbo Boost Technology 2.0
EIST	Enhanced SpeedStep Technology
TXT	Trusted Execution Technology (SMX)
TSX	Transactional Synchronization Extensions

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Facts about "Xeon D-1521 - Intel"

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Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Xeon D-1521 - Intel#pcie +
back image	+
base frequency	2,400 MHz (2.4 GHz, 2,400,000 kHz) +
bus type	DMI 2.0 +
clock multiplier	24 +
core count	4 +
core family	6 +
core model	6 +
core name	Broadwell DE +
core stepping	V2 +
designer	Intel +
die area	246.24 mm² (0.382 in², 2.462 cm², 246,240,000 µm²) +
family	Xeon D +
first announced	November 1, 2015 +
first launched	November 1, 2015 +
full page name	intel/xeon d/d-1521 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has ecc memory support	true +
has extended page tables support	true +
has feature	Trusted Execution Technology +, Transactional Synchronization Extensions +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Secure Key Technology + and OS Guard +
has intel enhanced speedstep technology	true +
has intel secure key technology	true +
has intel supervisor mode execution protection	true +
has intel trusted execution technology	true +
has intel turbo boost technology 2 0	true +
has intel vt-d technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has second level address translation support	true +
has simultaneous multithreading	true +
has transactional synchronization extensions	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
isa	x86-64 +
isa family	x86 +
l1$ size	256 KiB (262,144 B, 0.25 MiB) +
l1d$ description	8-way set associative +
l1d$ size	128 KiB (131,072 B, 0.125 MiB) +
l1i$ description	8-way set associative +
l1i$ size	128 KiB (131,072 B, 0.125 MiB) +
l2$ description	8-way set associative +
l2$ size	1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ description	16-way set associative +
l3$ size	6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +
ldate	November 1, 2015 +
main image	+
manufacturer	Intel +
market segment	Server +
max cpu count	1 +
max memory	131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory bandwidth	31.78 GiB/s (32,542.72 MiB/s, 34.124 GB/s, 34,123.515 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels	2 +
max operating temperature	108 °C +
max sata ports	6 +
max usb ports	4 +
microarchitecture	Broadwell +
min operating temperature	0 °C +
model number	D-1521 +
name	Xeon D-1521 +
package	FCBGA-1667 +
part number	GG8067402568800 +
platform	Grangeville +
process	14 nm (0.014 μm, 1.4e-5 mm) +
release price	$ 199.00 (€ 179.10, £ 161.19, ¥ 20,562.67) +
release price (tray)	$ 199.00 (€ 179.10, £ 161.19, ¥ 20,562.67) +
s-spec	SR2DF +
s-spec (qs)	QJPX +
series	D-1500 +
smp max ways	1 +
supported memory type	DDR4-2133 +
tdp	45 W (45,000 mW, 0.0603 hp, 0.045 kW) +
technology	CMOS +
thread count	8 +
transistor count	3,200,000,000 +
turbo frequency (1 core)	2,700 MHz (2.7 GHz, 2,700,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +

@@ Line 108: / Line 108: @@
 == Expansions ==
-{{mpu expansions
+{{expansions
 | pcie revision      = 2.0
 | pcie revision 2    = 3.0

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