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Difference between revisions of "intel/xeon e5/e5-1650 v4"
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Revision as of 14:47, 13 December 2017
Template:mpu The Xeon E5-1650 v4 is a 64-bit hexa-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for 1S workstations. Operating at 3.6 GHz with a turbo boost frequency of 4 GHz for a single active core, this MPU has a TDP of 140 W and is manufactured on a 14 nm process (based on Broadwell).
Cache
- Main article: Broadwell § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 192 KiB 196,608 B 0.188 MiB |
6x32 KiB 8-way set associative (per core, write-back) |
| L1D$ | 192 KiB 196,608 B 0.188 MiB |
6x32 KiB 8-way set associative (per core, write-back) |
| L2$ | 1.5 MiB 1,536 KiB 1,572,864 B 0.00146 GiB |
6x256 KiB 8-way set associative (per core, write-back) |
| L3$ | 15 MiB 15,360 KiB 15,728,640 B 0.0146 GiB |
6x2.5 MiB 20-way set associative (shared, per core, write-back) |
Graphics
This microprocessor has no integrated graphics processing unit.
Memory controller
| Integrated Memory Controller | |
| Type | DDR4-2400 |
| Controllers | 1 |
| Channels | 4 |
| ECC Support | Yes |
| Max bandwidth | 71.53 GiB/s |
| Bandwidth (single) | 17.88 GiB/s |
| Bandwidth (dual) | 35.76 GiB/s |
| Max memory | 1,536 GiB |
| Physical Address Extensions | 46 bit |
Expansions
Features
[Edit/Modify Supported Features]
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Supported x86 Extensions & Processor Features
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Facts about "Xeon E5-1650 v4 - Intel"
| l1d$ description | 8-way set associative + |
| l1d$ size | 192 KiB (196,608 B, 0.188 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 192 KiB (196,608 B, 0.188 MiB) + |
| l2$ description | 8-way set associative + |
| l2$ size | 1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) + |
| l3$ description | 20-way set associative + |
| l3$ size | 15 MiB (15,360 KiB, 15,728,640 B, 0.0146 GiB) + |