From WikiChip
Difference between revisions of "amd/k6-2/k6-2-266bnz"
m (Bot: corrected param) |
m (Bot: replacing deprecated (and now obselete) {{mpu features}} with {{x86 features}}) |
||
Line 102: | Line 102: | ||
== Features == | == Features == | ||
− | {{ | + | {{x86 features |
| mmx = true | | mmx = true | ||
| 3dnow = true | | 3dnow = true |
Revision as of 15:43, 13 December 2017
Template:mpu K6-2/266BNZ was a 32-bit x86 K6-2-based mobile microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 266 MHz with a FSB operating at 66 MHz.
Contents
Cache
- Main article: K6-2 § Cache
L2$ can be 512 KiB to 1 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.
Cache Info [Edit Values] | ||
L1I$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
L1D$ | 32 KiB 32,768 B 0.0313 MiB |
1x32 KiB 2-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Features
[Edit/Modify Supported Features]
![]() |
Supported x86 Extensions & Processor Features
|
|||
|
- Auto-power down state
- Stop clock state
Documents
DataSheet
- Mobile AMD-K6-2 Processor Data Sheet; Publication #21896 Revision E/0, May 2000
Facts about "AMD-K6-2/266BNZ - AMD"
l1d$ description | 2-way set associative + |
l1d$ size | 32 KiB (32,768 B, 0.0313 MiB) + |
l1i$ description | 2-way set associative + |
l1i$ size | 32 KiB (32,768 B, 0.0313 MiB) + |