Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "amd/duron/dhm0850avs1b"
m (Bot: corrected param) |
m (Bot: replacing deprecated (and now obselete) {{mpu features}} with {{x86 features}}) |
||
| Line 106: | Line 106: | ||
== Features == | == Features == | ||
| − | {{ | + | {{x86 features |
| em64t = | | em64t = | ||
| nx = | | nx = | ||
Revision as of 14:43, 13 December 2017
Template:mpu The Mobile Duron 850 based on the Morgan (Camaro) core was a 32-bit x86 microprocessor developed by AMD and introduced in early 2001. This model was part of the second generation of the Duron family. Designed based on AMD's K7 on a 180 nm process, this MPU operated at 800 MHz with a bus capable of 200 MT/s with a max TDP of 25 W.
Cache
- Main article: K7 § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 64 KiB 65,536 B 0.0625 MiB |
1x64 KiB 2-way set associative |
| L1D$ | 64 KiB 65,536 B 0.0625 MiB |
1x64 KiB 2-way set associative |
| L2$ | 64 KiB 0.0625 MiB 65,536 B 6.103516e-5 GiB |
1x64 KiB 16-way set associative |
Graphics
This SoC has no integrated graphics processing unit.
Features
[Edit/Modify Supported Features]
 |
Supported x86 Extensions & Processor Features
|
|||||||||
|
||||||||||
- Halt State
- Sleep State
Documents
DataSheet
- Mobile AMD Duron Processor Model 7 Data Sheet; Publication # 24068; Rev: F; Issue Date: December 2001.
See also
Facts about "Duron 850 (Camaro) - AMD"
| base frequency | 850 MHz (0.85 GHz, 850,000 kHz) + |
| bus rate | 200 MT/s (0.2 GT/s, 200,000 kT/s) + |
| bus speed | 100 MHz (0.1 GHz, 100,000 kHz) + |
| bus type | FSB + |
| clock multiplier | 8.5 + |
| core count | 1 + |
| core family | 6 + |
| core model | 7 + |
| core name | Morgan + |
| core stepping | 0 + |
| core voltage | 1.4 V (14 dV, 140 cV, 1,400 mV) + |
| core voltage tolerance | 0.1 V + |
| cpuid | 670 + |
| designer | AMD + |
| die area | 105.68 mm² (0.164 in², 1.057 cm², 105,680,000 µm²) + |
| family | Duron + |
| first announced | May 14, 2001 + |
| first launched | May 14, 2001 + |
| full page name | amd/duron/dhm0850avs1b + |
| has feature | Halt State + and Sleep State + |
| has locked clock multiplier | true + |
| instance of | microprocessor + |
| io voltage | 2.5 V (25 dV, 250 cV, 2,500 mV) + |
| io voltage tolerance | 0.25 V + |
| l1d$ description | 2-way set associative + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ description | 2-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 16-way set associative + |
| l2$ size | 0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) + |
| ldate | May 14, 2001 + |
| manufacturer | AMD + |
| market segment | Mobile + |
| max case temperature | 368.15 K (95 °C, 203 °F, 662.67 °R) + |
| max cpu count | 1 + |
| max memory | 4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) + |
| max storage temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
| microarchitecture | K7 + |
| min case temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| min storage temperature | 233.15 K (-40 °C, -40 °F, 419.67 °R) + |
| model number | Duron 850 + |
| name | Duron 850 + |
| part number | DHM0850AVS1B + |
| process | 180 nm (0.18 μm, 1.8e-4 mm) + |
| series | Duron Mobile + |
| smp max ways | 1 + |
| tdp | 25 W (25,000 mW, 0.0335 hp, 0.025 kW) + |
| technology | CMOS + |
| thread count | 1 + |
| transistor count | 25,180,000 + |
| word size | 32 bit (4 octets, 8 nibbles) + |