-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Difference between revisions of "intel/microarchitectures/netburst (client)"
< intel | microarchitectures
(Nocona Xeon uses x86-64) |
|||
Line 9: | Line 9: | ||
|process=180 nm | |process=180 nm | ||
|isa=x86-32 | |isa=x86-32 | ||
+ | |isa2=x86-64 | ||
|predecessor=P6 | |predecessor=P6 |
Revision as of 18:44, 30 November 2017
Edit Values | |
NetBurst µarch | |
General Info | |
Arch Type | CPU |
Designer | Intel |
Manufacturer | Intel |
Introduction | November 20, 2000 |
Phase-out | April, 2006 |
Process | 180 nm |
Instructions | |
ISA | x86-32 |
Succession | |
NetBurst (also P68) was the microarchitecture for Intel's 180 nm process for desktops and servers as a successor to P6. NetBurst was replaced by the Core microarchitecture in early 2006.
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/microarchitectures/netburst_(client)&oldid=68763"
Facts about "NetBurst - Microarchitectures - Intel"
codename | NetBurst + |
designer | Intel + |
first launched | November 20, 2000 + |
full page name | intel/microarchitectures/netburst (client) + |
instance of | microarchitecture + |
instruction set architecture | x86-32 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | NetBurst + |
phase-out | April 2006 + |
process | 180 nm (0.18 μm, 1.8e-4 mm) + |