Semiconductor & Computer Engineering
-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Difference between revisions of "combined region-and-segment-table entry"
(CRSTE) |
(No difference)
|
Latest revision as of 01:32, 6 November 2017
A consolidated/combined region-and-segment-table entry (CRSTE) refers to a special entry in the translation lookaside buffer (TLB) which can be used by the translator instead of having to access the region and segment tables. This term is used exclusively by IBM for their z/Architecture ISA.