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Difference between revisions of "freescale/qoriq/p1021"
< freescale/qoriq

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|family=QorIQ
 
|family=QorIQ
 
|series=P1
 
|series=P1
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|frequency=533
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|frequency=1,200
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|frequency 2=800
 
 
|isa=Power ISA v2.03
 
|isa=Power ISA v2.03
 
|isa family=Power
 
|isa family=Power
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|core count=2
 
|core count=2
 
|thread count=2
 
|thread count=2
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|power=2.4 W
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|power=4.5 W
 
|package module 1={{packages/freescale/te-pbga-ii-689}}
 
|package module 1={{packages/freescale/te-pbga-ii-689}}
 
}}
 
}}
 +
'''QorIQ P1012''' is a {{arch|32}} [[dual-core]] embedded [[POWER]] microprocessor introduced by [[Freescale]] in late [[2009]]. This networking/embedded processor, which is based on the {{freescale|e500|l=arch}} microarchitecture and is fabricated on a [[45 nm SOI process]], operates at 1,200 MHz and supports 32-bit DDR3-800 memory.
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== Cache ==
 +
{{main|freescale/microarchitectures/e500#Memory_Hierarchy|l1=e500 § Cache}}
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{{cache size
 +
|l1 cache=128 KiB
 +
|l1i cache=64 KiB
 +
|l1i break=2x32 KiB
 +
|l1i desc=8-way set associative
 +
|l1d cache=64 KiB
 +
|l1d break=2x32 KiB
 +
|l1d desc=8-way set associative
 +
|l1d policy=
 +
|l2 cache=256 KiB
 +
|l2 break=1x256 KiB
 +
|l2 desc=8-way set associative
 +
|l2 policy=Write-through
 +
}}
 +
 +
== Memory controller ==
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{{memory controller
 +
|type=DDR3-800
 +
|ecc=Yes
 +
|controllers=1
 +
|channels=1
 +
|width=32 bit
 +
|max bandwidth=2.98 GiB/s
 +
|bandwidth schan=2.98 GiB/s
 +
}}
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 +
== Expansions ==
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* 3x 10/100/1000 Eithernet with 2x SGMII
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* 2x PCIe 1.0a controllers with 4 SerDes
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* 2x USB 2.0
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* SD/MMC
 +
* SPI
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* 2x I2C
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* UART
 +
* SEC 3.3 Security Acceleration
 +
 +
== Block Diagram ==
 +
: [[File:qoriq p1021 block diagram.png|800px]]
 +
 +
== Documents ==
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* [[:File:p1012-p1021.pdf|P1012/P1021 Product Brief]]

Revision as of 19:15, 31 October 2017

Template:mpu QorIQ P1012 is a 32-bit dual-core embedded POWER microprocessor introduced by Freescale in late 2009. This networking/embedded processor, which is based on the e500 microarchitecture and is fabricated on a 45 nm SOI process, operates at 1,200 MHz and supports 32-bit DDR3-800 memory.

Cache

Main article: e500 § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L2$256 KiB
0.25 MiB
262,144 B
2.441406e-4 GiB
  1x256 KiB8-way set associativeWrite-through

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-800
Supports ECCYes
Controllers1
Channels1
Width32 bit
Max Bandwidth2.98 GiB/s
3,051.52 MiB/s
3.2 GB/s
3,199.751 MB/s
0.00291 TiB/s
0.0032 TB/s
Bandwidth
Single 2.98 GiB/s

Expansions

  • 3x 10/100/1000 Eithernet with 2x SGMII
  • 2x PCIe 1.0a controllers with 4 SerDes
  • 2x USB 2.0
  • SD/MMC
  • SPI
  • 2x I2C
  • UART
  • SEC 3.3 Security Acceleration

Block Diagram

qoriq p1021 block diagram.png

Documents

Retrieved from "https://en.wikichip.org/w/index.php?title=freescale/qoriq/p1021&oldid=66485"
Facts about "QorIQ P1021 - Freescale"
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Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
QorIQ P1021 - Freescale#package +
base frequency1,200 MHz (1.2 GHz, 1,200,000 kHz) +
core count2 +
core namee500 v2 +
designerFreescale +
familyQorIQ +
first announcedDecember 7, 2009 +
first launchedJanuary 2010 +
full page namefreescale/qoriq/p1021 +
has ecc memory supporttrue +
instance ofmicroprocessor +
isaPower ISA v2.03 +
isa familyPower +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description8-way set associative +
l2$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
ldateJanuary 2010 +
main imageFile:qoriq freescale pbgaii.png +
manufacturerIBM +
market segmentNetworking + and Embedded +
max memory bandwidth2.98 GiB/s (3,051.52 MiB/s, 3.2 GB/s, 3,199.751 MB/s, 0.00291 TiB/s, 0.0032 TB/s) +
max memory channels1 +
microarchitecturee500 +
model numberP1021 +
nameQorIQ P1021 +
packageTE-PBGA-II-689 +
power dissipation4.5 W (4,500 mW, 0.00603 hp, 0.0045 kW) +
process45 nm (0.045 μm, 4.5e-5 mm) +
seriesP1 +
supported memory typeDDR3-800 +
technologyCMOS +
thread count2 +
word size32 bit (4 octets, 8 nibbles) +