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    Difference between revisions of "intel/core i7/i7-2660m"    
                	
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== Cache ==  | == Cache ==  | ||
| + | {{main|intel/microarchitectures/sandy_bridge#Memory_Hierarchy|l1=Sandy Bridge § Cache}}  | ||
| + | {{cache size  | ||
| + | |l1 cache=128 KiB  | ||
| + | |l1i cache=64 KiB  | ||
| + | |l1i break=2x32 KiB  | ||
| + | |l1i desc=8-way set associative  | ||
| + | |l1d cache=64 KiB  | ||
| + | |l1d break=2x32 KiB  | ||
| + | |l1d desc=8-way set associative  | ||
| + | |l1d policy=write-back  | ||
| + | |l2 cache=512 KiB  | ||
| + | |l2 break=2x256 KiB  | ||
| + | |l2 desc=8-way set associative  | ||
| + | |l2 policy=write-back  | ||
| + | |l3 cache=4 MiB  | ||
| + | |l3 break=2x2 MiB  | ||
| + | |l3 desc=16-way set associative  | ||
| + | |l3 policy=write-back  | ||
| + | }}  | ||
== Memory controller ==  | == Memory controller ==  | ||
Revision as of 19:07, 2 September 2017
Cache
- Main article: Sandy Bridge § Cache
 
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 Cache Organization  
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.  | 
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Memory controller
Expansions
Graphics
Features
[Edit/Modify Supported Features]
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 Supported x86 Extensions & Processor Features 
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Facts about "Core i7-2660M  - Intel"
| l1$ size | 128 KiB (131,072 B, 0.125 MiB) + | 
| l1d$ description | 8-way set associative + | 
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + | 
| l1i$ description | 8-way set associative + | 
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + | 
| l2$ description | 8-way set associative + | 
| l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + | 
| l3$ description | 16-way set associative + | 
| l3$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |