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Difference between revisions of "intel/atom/c3338"
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'''Atom C3338''' is a {{arch|64}} [[dual-core]] ultra-low power [[x86]] microserver [[system on a chip]] introduced by [[Intel]] in 2017. The C3338, which is manufactured on a [[14 nm process]], is based on the {{intel|Goldmont|l=arch}} microarchitecture. This chip operates at 1.5 GHz with a [[TDP]] of 9 W and a {{intel|turbo boost}} frequency of up to 2.2 GHz. The C3338 supports up to a single channel of 128 GiB of DDR4-1866 [[ECC]] memory.
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'''Atom C3338''' is a {{arch|64}} [[dual-core]] ultra-low power [[x86]] microserver [[system on a chip]] introduced by [[Intel]] in 2017. The C3338, which is manufactured on a [[14 nm process]], is based on the {{intel|Goldmont|l=arch}} microarchitecture. This chip operates at 1.5 GHz with a [[TDP]] of 9 W and a {{intel|turbo boost}} frequency of up to 2.2 GHz. The C3338 supports up to a single channel of 128 GiB of DDR4-1866 [[ECC]] memory. This model is part of {{intel|Denverton|l=core}}'s [[part of::Network and Enterprise Storage SKUs]].
  
 
== Cache ==
 
== Cache ==

Revision as of 06:06, 16 August 2017

Template:mpu Atom C3338 is a 64-bit dual-core ultra-low power x86 microserver system on a chip introduced by Intel in 2017. The C3338, which is manufactured on a 14 nm process, is based on the Goldmont microarchitecture. This chip operates at 1.5 GHz with a TDP of 9 W and a turbo boost frequency of up to 2.2 GHz. The C3338 supports up to a single channel of 128 GiB of DDR4-1866 ECC memory. This model is part of Denverton's Network and Enterprise Storage SKUs.

Cache

Main article: Goldmont § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$112 KiB
114,688 B
0.109 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back
L1D$48 KiB
49,152 B
0.0469 MiB
2x24 KiB6-way set associativewrite-back

L2$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  2x2 MiB16-way set associativewrite-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3L-1600, DDR4-1866
Supports ECCYes
Max Mem128 GiB
Controllers1
Channels1
Max Bandwidth13.91 GiB/s
14,243.84 MiB/s
14.936 GB/s
14,935.749 MB/s
0.0136 TiB/s
0.0149 TB/s
Bandwidth
Single 13.91 GiB/s
Facts about "Atom C3338 - Intel"
has ecc memory supporttrue +
l1$ size112 KiB (114,688 B, 0.109 MiB) +
l1d$ description6-way set associative +
l1d$ size48 KiB (49,152 B, 0.0469 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description16-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
max memory bandwidth13.91 GiB/s (14,243.84 MiB/s, 14.936 GB/s, 14,935.749 MB/s, 0.0136 TiB/s, 0.0149 TB/s) +
max memory channels1 +
part ofNetwork and Enterprise Storage SKUs +
supported memory typeDDR3L-1600 + and DDR4-1866 +