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Difference between revisions of "intel/atom/c3308"
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== Cache == | == Cache == | ||
{{main|intel/microarchitectures/goldmont#Memory_Hierarchy|l1=Goldmont § Cache}} | {{main|intel/microarchitectures/goldmont#Memory_Hierarchy|l1=Goldmont § Cache}} | ||
− | {{cache size}} | + | {{cache size |
+ | |l1 cache=112 KiB | ||
+ | |l1i cache=64 KiB | ||
+ | |l1i break=2x32 KiB | ||
+ | |l1i desc=8-way set associative | ||
+ | |l1i policy=write-back | ||
+ | |l1d cache=48 KiB | ||
+ | |l1d break=2x24 KiB | ||
+ | |l1d desc=6-way set associative | ||
+ | |l1d policy=write-back | ||
+ | |l2 cache=4 MiB | ||
+ | |l2 break=2x2 MiB | ||
+ | |l2 desc=16-way set associative | ||
+ | |l2 policy=write-back | ||
+ | }} |
Revision as of 23:13, 15 August 2017
Template:mpu Atom C3308 is a 64-bit dual-core ultra-low power x86 microserver system on a chip introduced by Intel in 2017. The C3308, which is manufactured on a 14 nm process, is based on the Goldmont microarchitecture. This chip operates at 1.6 GHz with a TDP of 9.5 W and a turbo boost frequency of up to 2.1 GHz. The C3308 supports up to a single channel of 128 GiB of DDR4-1866 ECC memory.
Cache
- Main article: Goldmont § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Facts about "Atom C3308 - Intel"
has ecc memory support | false + |
l1$ size | 112 KiB (114,688 B, 0.109 MiB) + |
l1d$ description | 6-way set associative + |
l1d$ size | 48 KiB (49,152 B, 0.0469 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 16-way set associative + |
l2$ size | 4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) + |