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Difference between revisions of "renesas/r-car/e2"
< renesas‎ | r-car

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{{renesas title|R-Car E2}}
 
{{renesas title|R-Car E2}}
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{{mpu}}
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{{mpu
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|name=R-Car E2
 +
|image=r-car e2.jpg
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|designer=Renesas
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|designer 2=ARM Holdings
 +
|manufacturer=TSMC
 +
|model number=E2
 +
|part number=R8A7794
 +
|market=Embedded
 +
|first announced=October 22, 2014
 +
|first launched=June, 2016
 +
|family=R-Car
 +
|series=2nd Gen
 +
|frequency=1,000 MHz
 +
|isa=ARMv7
 +
|isa family=ARM
 +
|isa 2=SuperH
 +
|isa 2 family=SuperH
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|microarch=Cortex-A7
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|microarch 2=SH-4A
 +
|core name=Cortex-A7
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|core name 2=SH-4A
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|process=28 nm
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|technology=CMOS
 +
|word size=32 bit
 +
|core count=3
 +
|thread count=3
 +
|max cpus=1
 +
|v core=1.0 V
 +
|v io=3.3 V
 +
|v io 2=1.8 V
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|package module 1={{packages/renesas/fcbga-501}}
 +
}}

Revision as of 02:37, 22 July 2017

Template:mpu

Retrieved from "https://en.wikichip.org/w/index.php?title=renesas/r-car/e2&oldid=55827"
Facts about "R-Car E2 - Renesas"
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has ecc memory supportfalse +
integrated gpuPowerVR SGX540 +
integrated gpu base frequency260 MHz (0.26 GHz, 260,000 KHz) +
integrated gpu designerImagination Technologies +
integrated gpu execution units1 +
l1$ size192 KiB (196,608 B, 0.188 MiB) +
l1d$ size96 KiB (98,304 B, 0.0938 MiB) +
l1i$ size96 KiB (98,304 B, 0.0938 MiB) +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
max memory bandwidth9.93 GiB/s (10,168.32 MiB/s, 10.662 GB/s, 10,662.256 MB/s, 0.0097 TiB/s, 0.0107 TB/s) +
max memory channels2 +
supported memory typeDDR3-1333 +