From WikiChip
Difference between revisions of "intel/celeron/g3920"
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{{mpu | {{mpu | ||
|name=Celeron G3920 | |name=Celeron G3920 | ||
+ | |image=skylake (fclga1151).png | ||
|designer=Intel | |designer=Intel | ||
|manufacturer=Intel | |manufacturer=Intel | ||
Line 8: | Line 9: | ||
|s-spec=SR2HX | |s-spec=SR2HX | ||
|market=Desktop | |market=Desktop | ||
+ | |first announced=October 19, 2015 | ||
+ | |first launched=October 19, 2015 | ||
+ | |release price=$52.00 | ||
|family=Celeron | |family=Celeron | ||
|series=3000 | |series=3000 | ||
|locked=Yes | |locked=Yes | ||
+ | |frequency=2,900 MHz | ||
+ | |bus type=DMI 3.0 | ||
+ | |bus links=4 | ||
+ | |bus rate=8 GT/s | ||
+ | |clock multiplier=29 | ||
|isa=x86-64 | |isa=x86-64 | ||
|isa family=x86 | |isa family=x86 | ||
|microarch=Skylake | |microarch=Skylake | ||
+ | |chipset=Sunrise Point | ||
|core name=Skylake S | |core name=Skylake S | ||
|core family=6 | |core family=6 | ||
+ | |core model=94 | ||
|process=14 nm | |process=14 nm | ||
|technology=CMOS | |technology=CMOS | ||
+ | |die area=98.57 mm² | ||
+ | |die length=10.3 mm | ||
+ | |die width=9.57 mm | ||
|word size=64 bit | |word size=64 bit | ||
+ | |core count=2 | ||
+ | |thread count=2 | ||
+ | |max cpus=1 | ||
+ | |max memory=64 GiB | ||
+ | |v core min=0.55 V | ||
+ | |v core max=1.52 V | ||
+ | |tdp=51 W | ||
+ | |tjunc min=0 °C | ||
+ | |tjunc max=100 °C | ||
+ | |tstorage min=-25 °C | ||
+ | |tstorage max=125 °C | ||
|package module 1={{packages/intel/fclga-1151}} | |package module 1={{packages/intel/fclga-1151}} | ||
}} | }} |
Revision as of 07:53, 8 July 2017
Cache
- Main article: Skylake § Cache
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Facts about "Celeron G3920 - Intel"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Celeron G3920 - Intel#package + and Celeron G3920 - Intel#io + |
base frequency | 2,900 MHz (2.9 GHz, 2,900,000 kHz) + |
bus links | 4 + |
bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
bus type | DMI 3.0 + |
chipset | Sunrise Point + |
clock multiplier | 29 + |
core count | 2 + |
core family | 6 + |
core model | 94 + |
core name | Skylake S + |
core voltage (max) | 1.52 V (15.2 dV, 152 cV, 1,520 mV) + |
core voltage (min) | 0.55 V (5.5 dV, 55 cV, 550 mV) + |
designer | Intel + |
device id | 0x1902 + |
die area | 98.57 mm² (0.153 in², 0.986 cm², 98,570,000 µm²) + |
die length | 10.3 mm (1.03 cm, 0.406 in, 10,300 µm) + |
die width | 9.57 mm (0.957 cm, 0.377 in, 9,570 µm) + |
family | Celeron + |
first announced | October 19, 2015 + |
first launched | October 19, 2015 + |
full page name | intel/celeron/g3920 + |
has advanced vector extensions | true + |
has advanced vector extensions 2 | true + |
has ecc memory support | true + |
has extended page tables support | true + |
has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Software Guard Extensions + and Secure Key Technology + |
has intel enhanced speedstep technology | true + |
has intel secure key technology | true + |
has intel vt-d technology | true + |
has intel vt-x technology | true + |
has locked clock multiplier | true + |
has second level address translation support | true + |
has x86 advanced encryption standard instruction set extension | true + |
instance of | microprocessor + |
integrated gpu | HD Graphics 510 + |
integrated gpu base frequency | 350 MHz (0.35 GHz, 350,000 KHz) + |
integrated gpu designer | Intel + |
integrated gpu execution units | 12 + |
integrated gpu max frequency | 950 MHz (0.95 GHz, 950,000 KHz) + |
integrated gpu max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) + |
isa | x86-64 + |
isa family | x86 + |
l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
l1d$ description | 8-way set associative + |
l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l1i$ description | 8-way set associative + |
l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
l2$ description | 4-way set associative + |
l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
l3$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
ldate | October 19, 2015 + |
main image | + |
manufacturer | Intel + |
market segment | Desktop + |
max cpu count | 1 + |
max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
max memory channels | 2 + |
max pcie lanes | 16 + |
max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
microarchitecture | Skylake + |
min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
model number | G3920 + |
name | Celeron G3920 + |
package | FCLGA-1151 + |
part number | BX80662G3920 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
release price | $ 52.00 (€ 46.80, £ 42.12, ¥ 5,373.16) + |
s-spec | SR2HX + |
series | 3000 + |
smp max ways | 1 + |
socket | LGA-1151 + |
supported memory type | DDR3L-1600 + and DDR4-2133 + |
tdp | 51 W (51,000 mW, 0.0684 hp, 0.051 kW) + |
technology | CMOS + |
thread count | 2 + |
word size | 64 bit (8 octets, 16 nibbles) + |
x86/has software guard extensions | true + |