From WikiChip
Difference between revisions of "intel/core i3/i3-6100e"
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|l3 break=2x1.5 MiB | |l3 break=2x1.5 MiB | ||
|l3 policy=write-back | |l3 policy=write-back | ||
| + | }} | ||
| + | |||
| + | == Memory controller == | ||
| + | {{memory controller | ||
| + | |type=LPDDR3-1866 | ||
| + | |type 2=DDR3L-1600 | ||
| + | |type 3=DDR4-2133 | ||
| + | |ecc=Yes | ||
| + | |max mem=64 GiB | ||
| + | |controllers=1 | ||
| + | |channels=2 | ||
| + | |max bandwidth=31.79 GiB/s | ||
| + | |bandwidth schan=15.89 GiB/s | ||
| + | |bandwidth dchan=31.79 GiB/s | ||
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Revision as of 01:13, 8 July 2017
Template:mpu Core i3-6100E is a 64-bit dual-core x86 low-end performance mobile microprocessor introduced by Intel late 2015. This processor, which is based on the Skylake microarchitecture and manufactured on a 14 nm process, has a base frequency of 2.7 GHz with a TDP of 35 W. This processor incorporates the HD Graphics 530 GPU clocked at 350 MHz with a max frequency of 950 MHz.
Cache
- Main article: Skylake § Cache
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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes. |
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Memory controller
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Integrated Memory Controller
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Graphics
| Integrated Graphic Information | |
| GPU | Intel HD Graphics 530 |
| Device ID | 0x191B |
| Displays | 3 |
| Frequency | 350 MHz 0.35 GHz
350,000 KHz |
| Max frequency | 950 MHz 0.95 GHz
950,000 KHz |
| Max memory | 64 GiB 65,536 MiB
67,108,864 KiB 68,719,476,736 B |
| Output | DisplayPort, Embedded DisplayPort, HDMI, DVI |
| DirectX | 12 |
| OpenGL | 4.4 |
| OpenCL | 2.0 |
| HDMI | 1.4a |
| DP | 1.2 |
| eDP | 1.3 |
| Max HDMI Res | 4096x2304 @24 Hz |
| Max DP Res | 4096x2304 @60 Hz |
| Max eDP Res | 4096x2304 @60 Hz |
| Intel Quick Sync Video | |
| Intel InTru 3D | |
| Intel Insider | |
| Intel WiDi (Wireless Display) | |
| Intel Clear Video | |
Expansions
Features
Facts about "Core i3-6100E - Intel"
| Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Core i3-6100E - Intel#package + and Core i3-6100E - Intel#io + |
| base frequency | 2,700 MHz (2.7 GHz, 2,700,000 kHz) + |
| bus links | 4 + |
| bus rate | 8,000 MT/s (8 GT/s, 8,000,000 kT/s) + |
| bus type | DMI 3.0 + |
| clock multiplier | 27 + |
| core count | 2 + |
| core family | 6 + |
| core model | 94 + |
| core name | Skylake H + |
| core stepping | R0 + |
| core voltage (max) | 1.52 V (15.2 dV, 152 cV, 1,520 mV) + |
| core voltage (min) | 0.55 V (5.5 dV, 55 cV, 550 mV) + |
| designer | Intel + |
| device id | 0x191B + |
| die area | 98.57 mm² (0.153 in², 0.986 cm², 98,570,000 µm²) + |
| die length | 10.3 mm (1.03 cm, 0.406 in, 10,300 µm) + |
| die width | 9.57 mm (0.957 cm, 0.377 in, 9,570 µm) + |
| family | Core i3 + |
| first announced | October 12, 2015 + |
| first launched | October 12, 2015 + |
| full page name | intel/core i3/i3-6100e + |
| has advanced vector extensions | true + |
| has advanced vector extensions 2 | true + |
| has ecc memory support | true + |
| has extended page tables support | true + |
| has feature | Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Memory Protection Extensions +, Software Guard Extensions +, Secure Key Technology +, OS Guard + and Identity Protection Technology + |
| has intel enhanced speedstep technology | true + |
| has intel identity protection technology support | true + |
| has intel secure key technology | true + |
| has intel supervisor mode execution protection | true + |
| has intel vt-d technology | true + |
| has intel vt-x technology | true + |
| has locked clock multiplier | true + |
| has second level address translation support | true + |
| has simultaneous multithreading | true + |
| has transactional synchronization extensions | true + |
| has x86 advanced encryption standard instruction set extension | true + |
| instance of | microprocessor + |
| integrated gpu | HD Graphics 530 + |
| integrated gpu base frequency | 350 MHz (0.35 GHz, 350,000 KHz) + |
| integrated gpu designer | Intel + |
| integrated gpu execution units | 24 + |
| integrated gpu max frequency | 950 MHz (0.95 GHz, 950,000 KHz) + |
| integrated gpu max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) + |
| isa | x86-64 + |
| isa family | x86 + |
| l1$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1d$ description | 8-way set associative + |
| l1d$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l1i$ description | 8-way set associative + |
| l1i$ size | 64 KiB (65,536 B, 0.0625 MiB) + |
| l2$ description | 4-way set associative + |
| l2$ size | 0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) + |
| l3$ size | 3 MiB (3,072 KiB, 3,145,728 B, 0.00293 GiB) + |
| ldate | October 12, 2015 + |
| main image | |
| manufacturer | Intel + |
| market segment | Embedded + |
| max cpu count | 1 + |
| max junction temperature | 373.15 K (100 °C, 212 °F, 671.67 °R) + |
| max memory | 65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB, 0.0625 TiB) + |
| max memory bandwidth | 31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) + |
| max memory channels | 2 + |
| max operating temperature | 100 °C + |
| max pcie lanes | 16 + |
| max storage temperature | 398.15 K (125 °C, 257 °F, 716.67 °R) + |
| microarchitecture | Skylake + |
| min junction temperature | 273.15 K (0 °C, 32 °F, 491.67 °R) + |
| min operating temperature | 0 °C + |
| min storage temperature | 248.15 K (-25 °C, -13 °F, 446.67 °R) + |
| model number | i3-6100E + |
| name | Core i3-6100E + |
| package | FCBGA-1440 + |
| part number | CL8066201939604 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| release price | $ 225.00 (€ 202.50, £ 182.25, ¥ 23,249.25) + |
| s-spec | SR2DV + |
| series | i3-6000 + |
| smp max ways | 1 + |
| supported memory type | LPDDR3-1866 +, DDR3L-1600 + and DDR4-2133 + |
| tdp | 35 W (35,000 mW, 0.0469 hp, 0.035 kW) + |
| technology | CMOS + |
| thread count | 4 + |
| transistor count | 1,750,000,000 + |
| word size | 64 bit (8 octets, 16 nibbles) + |
| x86/has memory protection extensions | true + |
| x86/has software guard extensions | true + |