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Difference between revisions of "intel/core i7/i7-6500u"
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== Features ==
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{{x86 features}}

Revision as of 21:23, 3 July 2017

Template:mpu Core i7-6500U is a 64-bit dual-core high-end performance x86 mobile microprocessor introduced by Intel in late 2015. Fabricated on a 14 nm process based on the Skylake microarchitecture, this processor operates at 2.5 GHz with a turbo boost of up to 3.1 GHz. The i7-6500U has a TDP of 15 W with a configurable-down TDP of 7.5 W (800 MHz) and a configurable-up TDP of 25 W (2.6 GHz). This chip incorporates the HD Graphics 520 GPU operating at 300 MHz with a burst frequency of 1.05 GHz. This processor supports up to 32 GiB of non-ECC dual-channel DDR4-2133 memory.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

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Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
131,072 B
0.125 MiB
L1I$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associative 
L1D$64 KiB
65,536 B
0.0625 MiB
2x32 KiB8-way set associativewrite-back

L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  2x256 KiB4-way set associativewrite-back

L3$4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
  2x2 MiB write-back

Memory controller

[Edit/Modify Memory Info]

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Integrated Memory Controller
Max TypeDDR4-2133, LPDDR3-1866, DDR3L-1600
Supports ECCNo
Max Mem32 GiB
Controllers1
Channels2
Max Bandwidth31.79 GiB/s
32,552.96 MiB/s
34.134 GB/s
34,134.253 MB/s
0.031 TiB/s
0.0341 TB/s
Bandwidth
Single 15.89 GiB/s
Double 31.79 GiB/s

Expansions

[Edit/Modify Expansions Info]

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Expansion Options
PCIe
Revision3.0
Max Lanes12
Configs1x4, 2x2, 1x2+2x1, 4x1


Graphics

[Edit/Modify IGP Info]

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Integrated Graphics Information
GPUHD Graphics 520
DesignerIntelDevice ID0x1916
Execution Units24Max Displays3
Max Memory32 GiB
32,768 MiB
33,554,432 KiB
34,359,738,368 B
Frequency300 MHz
0.3 GHz
300,000 KHz
Burst Frequency1,050 MHz
1.05 GHz
1,050,000 KHz
OutputDP, eDP, HDMI, DVI

Max Resolution
HDMI4096x2304 @24 Hz
DP4096x2304 @60 Hz
eDP4096x2304 @60 Hz

Standards
DirectX12
OpenGL4.4
OpenCL2.0
DP1.2
eDP1.3
HDMI1.4a

Additional Features
Intel Quick Sync Video
Intel InTru 3D
Intel Clear Video
Intel Clear Video HD

Features

[Edit/Modify Supported Features]

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Supported x86 Extensions & Processor Features
Facts about "Core i7-6500U - Intel"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i7-6500U - Intel#io +
device id0x1916 +
has ecc memory supportfalse +
integrated gpuHD Graphics 520 +
integrated gpu base frequency300 MHz (0.3 GHz, 300,000 KHz) +
integrated gpu designerIntel +
integrated gpu execution units24 +
integrated gpu max frequency1,050 MHz (1.05 GHz, 1,050,000 KHz) +
integrated gpu max memory32,768 MiB (33,554,432 KiB, 34,359,738,368 B, 32 GiB) +
l1$ size128 KiB (131,072 B, 0.125 MiB) +
l1d$ description8-way set associative +
l1d$ size64 KiB (65,536 B, 0.0625 MiB) +
l1i$ description8-way set associative +
l1i$ size64 KiB (65,536 B, 0.0625 MiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l3$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
max memory bandwidth31.79 GiB/s (32,552.96 MiB/s, 34.134 GB/s, 34,134.253 MB/s, 0.031 TiB/s, 0.0341 TB/s) +
max memory channels2 +
max pcie lanes12 +
supported memory typeDDR4-2133 +, LPDDR3-1866 + and DDR3L-1600 +