Revision as of 17:53, 30 June 2017

Template:mpu Godson-2D (龙芯2D) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Announced in late 2004, the Godson-2D operates at up to 700 MHz consuming 3-5W. This chip was manufactured on STMicroelectronics' 0.13 µm process. This chip reached tapeout on September 12, 2004.

The Godson-2D was initially announced on November of 2004 with plans to be launched in February of 2005. It was later postponed to April of 2005. During the 2006 International Innovation Conference, it was announced that the Godson-2D was complete and would begin shipping starting the summer of 2006. It's unknown if the chip was ever made it to market. But even if the chip did get released it was likely discontinued and superseded shortly after due to the release of the 2E which was architecturally very similar but operated at higher frequencies.

Loongson has claimed the Godson-2D has reached the performance level of 1.3-1.4 GHz PIV based on their SPECint2000 scores.

Cache

Main article: GS464 § Cache

[Edit/Modify Cache Info]

Cache Organization Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory. The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC. Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies. Note: All units are in kibibytes and mebibytes.

L1$ 128 KiB 131,072 B 0.125 MiB L1I$ 64 KiB 65,536 B 0.0625 MiB 1x64 KiB 4-way set associative   L1D$ 64 KiB 65,536 B 0.0625 MiB 1x64 KiB 4-way set associative