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Difference between revisions of "amd/k6-2/k6-2-300bnz-66"
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| model number        = K6-2/300BNZ-66
 
| model number        = K6-2/300BNZ-66
 
| part number        = AMD-K6-2/300BNZ-66
 
| part number        = AMD-K6-2/300BNZ-66
| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Mobile
 
| market              = Mobile
 
| first announced    = March 22, 1999
 
| first announced    = March 22, 1999

Revision as of 17:34, 30 June 2017

Template:mpu K6-2/300BNZ-66 was a 32-bit x86 K6-2-based mobile microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 300 MHz with a FSB operating at 66 MHz.

Cache

Main article: K6-2 § Cache

L2$ can be 512 KiB to 1 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L1D$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative

Graphics

This SoC has no integrated graphics processing unit.

Features

Template:mpu features

  • Auto-power down state
  • Stop clock state

Documents

DataSheet

l1d$ description2-way set associative +
l1d$ size32 KiB (32,768 B, 0.0313 MiB) +
l1i$ description2-way set associative +
l1i$ size32 KiB (32,768 B, 0.0313 MiB) +