From WikiChip
Difference between revisions of "amd/am486/am486dx2-100v8b"
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| model number = Am486DX2-100V8B | | model number = Am486DX2-100V8B | ||
| part number = A80486DX2-100V8B | | part number = A80486DX2-100V8B | ||
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| part number 2 = | | part number 2 = | ||
| part number 3 = | | part number 3 = | ||
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| market = Desktop | | market = Desktop | ||
| first announced = | | first announced = |
Revision as of 17:09, 30 June 2017
Template:mpu Am486DX2-100V8B was an 80486-compatible microprocessor introduced by AMD in 1994. This processor had a clock multiplier of 2 having base frequency of 100 MHz with a bus frequency of 50 MHz. This model is a write-back cache version of the Am486DX2-100V8T (and older 100). The Am486DX2-100V16B is an identical model with double the L1 cache of this one.
Cache
- Main article: 80486 § Cache
Cache Info [Edit Values] | ||
L1$ | 8 KiB 8,192 B 0.00781 MiB |
1x8 KiB 4-way set associative (unified, write-through policy) |
Graphics
This chip had no integrated graphics processing unit.
See also
Facts about "Am486DX2-100V8B - AMD"
l1$ description | 4-way set associative + |
l1$ size | 8 KiB (8,192 B, 0.00781 MiB) + |