From WikiChip
Difference between revisions of "ambric/am2000/am2016"
< ambric‎ | am2000

m (Bot: corrected mem)
Line 95: Line 95:
 
| bandwidth schan    =  
 
| bandwidth schan    =  
 
| bandwidth dchan    =  
 
| bandwidth dchan    =  
−
| max memory        = 4 GB
+
| max memory        = 4 GiB
 
}}
 
}}
  

Revision as of 05:52, 23 June 2017

Template:mpu Am2016 was an MPPA introduced in late 2007 by Ambric. This model was made of roughly 16 Brics arranged as a grid, making up a total of 120 32-bit RICS-like cores operating asynchronously at 1-350 MHz.

Architecture

Main article: Am2000 § Architecture

The Am2016 is made of 16 homogeneous 'Brics' laid out in a grid to form 120 cores.

General layout:

  • 16x Brics

Memory controller

Integrated Memory Controller
Type DDR2-400
Controllers 2
Channels 1
Max memory 4 GiB

Expansions

  • PCIe
  • JTAG
  • 128x GPIO @ 100 MHz
  • serial flash
Retrieved from "https://en.wikichip.org/w/index.php?title=ambric/am2000/am2016&oldid=46987"
Facts about "Am2016 - Ambric"
RDF feed
has featurePCIe +, JTAG +, GPIO + and serial flash +