From WikiChip
Difference between revisions of "pezy/pezy-scx/pezy-sc4"
Line 42: | Line 42: | ||
|channels=8 | |channels=8 | ||
|max bandwidth=22.35 TiB/s | |max bandwidth=22.35 TiB/s | ||
+ | }} | ||
+ | |||
+ | == Expansions == | ||
+ | {{expansions | ||
+ | | pcie revision = 3.0 | ||
+ | | pcie lanes = 512 | ||
+ | | pcie config = x16 | ||
+ | | pcie config 2 = x8 | ||
+ | | pcie config 3 = x4 | ||
+ | | uart = Yes | ||
+ | | gp io = Yes | ||
}} | }} |
Revision as of 06:30, 23 June 2017
Template:mpu PEZY-SC4 (PEZY Super Computer 4) is fifth generation many-core microprocessor planned by PEZY. The SC4 incorporates 16,192 cores, twice times as many cores as its predecessor.
Planned to be fabricated on TSMC's 5 nm process, PEZY-SC5 operates at 1.6 GHz and consume around 640 W while delivering performance in the order of 210 TFLOPS (HP), 105 TFLOPS (SP), and 52.5 TFLOPS (DP).
Memory controller
Integrated Memory Controller
|
||||||||||||
|
Integrated Memory Controller
|
||||||||||
|
Expansions
Expansion Options
|
||||||||||||
|
Facts about "PEZY-SC4 - PEZY"
base frequency | 1,600 MHz (1.6 GHz, 1,600,000 kHz) + |
core count | 16,384 + |
core voltage | 0.55 V (5.5 dV, 55 cV, 550 mV) + |
designer | PEZY + |
die area | 740 mm² (1.147 in², 7.4 cm², 740,000,000 µm²) + |
family | PEZY-SCx + |
first announced | 2016 + |
first launched | 2020 + |
full page name | pezy/pezy-scx/pezy-sc4 + |
has ecc memory support | true + and false + |
instance of | microprocessor + |
ldate | 3000 + |
manufacturer | TSMC + |
market segment | Supercomputer + |
max memory bandwidth | 119.2 GiB/s (122,060.8 MiB/s, 127.99 GB/s, 127,990.025 MB/s, 0.116 TiB/s, 0.128 TB/s) + and 22,886.4 GiB/s (23,435,673.6 MiB/s, 24,574.085 GB/s, 24,574,084.881 MB/s, 22.35 TiB/s, 24.574 TB/s) + |
max memory channels | 4 + and 8 + |
model number | PEZY-SC4 + |
name | PEZY-SC4 + |
peak flops (double-precision) | 52,428,800,000,000 FLOPS (52,428,800,000 KFLOPS, 52,428,800 MFLOPS, 52,428.8 GFLOPS, 52.429 TFLOPS, 0.0524 PFLOPS, 5.24288e-5 EFLOPS, 5.24288e-8 ZFLOPS) + |
peak flops (half-precision) | 209,715,200,000,000 FLOPS (209,715,200,000 KFLOPS, 209,715,200 MFLOPS, 209,715.2 GFLOPS, 209.715 TFLOPS, 0.21 PFLOPS, 2.097152e-4 EFLOPS, 2.097152e-7 ZFLOPS) + |
peak flops (single-precision) | 104,857,600,000,000 FLOPS (104,857,600,000 KFLOPS, 104,857,600 MFLOPS, 104,857.6 GFLOPS, 104.858 TFLOPS, 0.105 PFLOPS, 1.048576e-4 EFLOPS, 1.048576e-7 ZFLOPS) + |
power dissipation | 640 W (640,000 mW, 0.858 hp, 0.64 kW) + |
process | 5 nm (0.005 μm, 5.0e-6 mm) + |
supported memory type | DDR5-4000 + |
technology | CMOS + |
thread count | 131,072 + |