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Difference between revisions of "compaq/microarchitectures/alpha 21364"
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|atype=CPU | |atype=CPU | ||
|name=Alpha 21364 | |name=Alpha 21364 | ||
− | |designer=Compaq | + | |designer=DEC |
+ | |designer 2=Compaq | ||
|manufacturer=Samsung | |manufacturer=Samsung | ||
|introduction=January 20, 2002 | |introduction=January 20, 2002 |
Revision as of 19:07, 11 June 2017
Edit Values | |
Alpha 21364 µarch | |
General Info | |
Arch Type | CPU |
Designer | DEC, Compaq |
Manufacturer | Samsung |
Introduction | January 20, 2002 |
Process | 0.18 µm |
Core Configs | 1 |
Pipeline | |
Type | Superscalar |
OoOE | Yes |
Speculative | Yes |
Reg Renaming | Yes |
Stages | 6 |
Decode | 4-way |
Instructions | |
ISA | Alpha |
Cache | |
L1I Cache | 64 KiB/core 2-way set associative |
L1D Cache | 64 KiB/core 2-way set associative |
Succession | |
Facts about "Alpha 21364 - Microarchitectures - Compaq"
codename | Alpha 21364 + |
core count | 1 + |
designer | DEC + and Compaq + |
first launched | January 20, 2002 + |
full page name | compaq/microarchitectures/alpha 21364 + |
instance of | microarchitecture + |
instruction set architecture | Alpha + |
manufacturer | Samsung + |
microarchitecture type | CPU + |
name | Alpha 21364 + |
pipeline stages | 6 + |
process | 180 nm (0.18 μm, 1.8e-4 mm) + |