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Difference between revisions of "intel/core i5/i5-7640x"
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|x8664=Yes
 
|x8664=Yes
 
|nx=Yes
 
|nx=Yes
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|3dnow=No
 
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|e3dnow=No
 
 
|mmx=Yes
 
|mmx=Yes
 
|emmx=Yes
 
|emmx=Yes
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|tbt1=No
 
|tbt1=No
 
|tbt2=Yes
 
|tbt2=Yes
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|tbmt3=Yes
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|tbmt3=No
 
|bpt=No
 
|bpt=No
 
|eist=Yes
 
|eist=Yes
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|flex=No
 
|flex=No
 
|fastmem=No
 
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|isrt=Yes
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|isrt=No
 
|sba=No
 
|sba=No
 
|mwt=No
 
|mwt=No
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|vtd=Yes
 
|vtd=Yes
 
|ept=Yes
 
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|mpx=Yes
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|mpx=No
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|sgx=Yes
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|sgx=No
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|securekey=Yes
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|securekey=No
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|osguard=Yes
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|osguard=No
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|3dnow=No
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|e3dnow=No
 
|smartmp=No
 
|smartmp=No
 
|powernow=No
 
|powernow=No
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|amdvi=No
 
|amdv=No
 
|amdv=No
 
|rvi=No
 
|rvi=No
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|smt=No
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|sensemi=No
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|xfr=No
 
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Revision as of 18:34, 30 May 2017

Template:mpu Core i5-7640X is a 64-bit quad-core high-range performance x86 desktop microprocessor introduced by Intel in mid-2017. This chip, which is based on the Kaby Lake microarchitecture, is fabricated on Intel's 14nm+ process. The i5-7640X operates at 4 GHz with a TDP of 112 W and a Turbo Boost frequency of 4.2 GHz. The processor supports up to 64 GiB of dual-channel DDR4-2666 memory.

Cache

Main article: Kaby Lake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back
L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back
L3$6 MiB
6,144 KiB
6,291,456 B
0.00586 GiB
  4x1.5 MiB write-back

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR4-2666
Supports ECCNo
Max Mem64 GiB
Controllers1
Channels2
Max Bandwidth39.74 GiB/s
40,693.76 MiB/s
42.671 GB/s
42,670.5 MB/s
0.0388 TiB/s
0.0427 TB/s
Bandwidth
Single 19.87 GiB/s
Double 39.74 GiB/s

Expansions

[Edit/Modify Expansions Info]

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Expansion Options
PCIe
Revision3.0
Max Lanes16
Configs1x16, 2x8, 1x8+2x4


Graphics

This processor has no integrated graphics.

Features

[Edit/Modify Supported Features]

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Supported x86 Extensions & Processor Features
MMXMMX Extension
EMMXExtended MMX Extension
SSEStreaming SIMD Extensions
SSE2Streaming SIMD Extensions 2
SSE3Streaming SIMD Extensions 3
SSSE3Supplemental SSE3
SSE4.1Streaming SIMD Extensions 4.1
SSE4.2Streaming SIMD Extensions 4.2
AVXAdvanced Vector Extensions
AVX2Advanced Vector Extensions 2
ABMAdvanced Bit Manipulation
BMI1Bit Manipulation Instruction Set 1
BMI2Bit Manipulation Instruction Set 2
FMA33-Operand Fused-Multiply-Add
AESAES Encryption Instructions
RdRandHardware RNG
ADXMulti-Precision Add-Carry
CLMULCarry-less Multiplication Extension
F16C16-bit Floating Point Conversion
x86-1616-bit x86
x86-3232-bit x86
x86-6464-bit x86
RealReal Mode
ProtectedProtected Mode
SMMSystem Management Mode
FPUIntegrated x87 FPU
NXNo-eXecute
TBT 2.0Turbo Boost Technology 2.0
EISTEnhanced SpeedStep Technology
VT-xVT-x (Virtualization)
VT-dVT-d (I/O MMU virtualization)
EPTExtended Page Tables (SLAT)
TSXTransactional Synchronization Extensions
Retrieved from "https://en.wikichip.org/w/index.php?title=intel/core_i5/i5-7640x&oldid=43593"
Facts about "Core i5-7640X - Intel"
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Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Core i5-7640X - Intel#io +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supportfalse +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables + and Transactional Synchronization Extensions +
has intel enhanced speedstep technologytrue +
has intel turbo boost technology 2 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has second level address translation supporttrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size6 MiB (6,144 KiB, 6,291,456 B, 0.00586 GiB) +
max memory bandwidth39.74 GiB/s (40,693.76 MiB/s, 42.671 GB/s, 42,670.5 MB/s, 0.0388 TiB/s, 0.0427 TB/s) +
max memory channels2 +
max pcie lanes16 +
supported memory typeDDR4-2666 +