-
WikiChip
WikiChip
-
Architectures
Popular x86
-
Intel
- Client
- Server
- Big Cores
- Small Cores
-
AMD
Popular ARM
-
ARM
- Server
- Big
- Little
-
Cavium
-
Samsung
-
-
Chips
Popular Families
-
Ampere
-
Apple
-
Cavium
-
HiSilicon
-
MediaTek
-
NXP
-
Qualcomm
-
Renesas
-
Samsung
-
From WikiChip
Difference between revisions of "24-bit architecture"
(→24-bit systems) |
|||
Line 7: | Line 7: | ||
== 24-bit systems == | == 24-bit systems == | ||
* {{harris|500|Harris 500}} | * {{harris|500|Harris 500}} | ||
− | + | * {{decc|PDP-2}} | |
{{stub}} | {{stub}} | ||
[[Category:24-bit microprocessors]] | [[Category:24-bit microprocessors]] |
Latest revision as of 10:06, 28 May 2017
The 24-bit architecture is a microprocessor or computer architecture that has a datapath width or a highest operand width of 24 bits or 3 octets. These architectures typically have a matching register file with registers width of 24 bits.
24-bit digital signal processors[edit]
24-bit systems[edit]
This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information. |